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-rw-r--r--hw/ac97.c3
-rw-r--r--hw/acpi.c3
-rw-r--r--hw/apb_pci.c3
-rw-r--r--hw/cirrus_vga.c3
-rw-r--r--hw/e1000.c3
-rw-r--r--hw/eepro100.c3
-rw-r--r--hw/es1370.c3
-rw-r--r--hw/grackle_pci.c6
-rw-r--r--hw/gt64xxx.c3
-rw-r--r--hw/ide.c9
-rw-r--r--hw/lsi53c895a.c2
-rw-r--r--hw/macio.c4
-rw-r--r--hw/ne2000.c3
-rw-r--r--hw/openpic.c3
-rw-r--r--hw/pci.c3
-rw-r--r--hw/pci.h36
-rw-r--r--hw/pcnet.c3
-rw-r--r--hw/piix_pci.c9
-rw-r--r--hw/ppc4xx_pci.c3
-rw-r--r--hw/prep_pci.c3
-rw-r--r--hw/rtl8139.c3
-rw-r--r--hw/sun4u.c3
-rw-r--r--hw/unin_pci.c12
-rw-r--r--hw/usb-ohci.c3
-rw-r--r--hw/usb-uhci.c6
-rw-r--r--hw/versatile_pci.c3
-rw-r--r--hw/vga.c3
-rw-r--r--hw/virtio-balloon.c2
-rw-r--r--hw/virtio-blk.c2
-rw-r--r--hw/virtio-console.c2
-rw-r--r--hw/virtio-net.c2
-rw-r--r--hw/virtio.c8
-rw-r--r--hw/virtio.h5
-rw-r--r--hw/vmware_vga.c5
34 files changed, 81 insertions, 86 deletions
diff --git a/hw/ac97.c b/hw/ac97.c
index 3a256a9926..ade2719118 100644
--- a/hw/ac97.c
+++ b/hw/ac97.c
@@ -1347,8 +1347,7 @@ int ac97_init (PCIBus *bus, AudioState *audio)
c[0x08] = 0x01; /* rid revision ro */
c[0x09] = 0x00; /* pi programming interface ro */
- c[0x0a] = 0x01; /* scc sub class code ro */
- c[0x0b] = 0x04; /* bcc base class code ro */
+ pci_config_set_class(c, PCI_CLASS_MULTIMEDIA_AUDIO); /* ro */
c[0x0e] = 0x00; /* headtyp header type ro */
c[0x10] = 0x01; /* nabmar native audio mixer base
diff --git a/hw/acpi.c b/hw/acpi.c
index 78e8d088fe..4338d02e5b 100644
--- a/hw/acpi.c
+++ b/hw/acpi.c
@@ -509,8 +509,7 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
pci_conf[0x07] = 0x02;
pci_conf[0x08] = 0x03; // revision number
pci_conf[0x09] = 0x00;
- pci_conf[0x0a] = 0x80; // other bridge device
- pci_conf[0x0b] = 0x06; // bridge device
+ pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
pci_conf[0x0e] = 0x00; // header_type
pci_conf[0x3d] = 0x01; // interrupt pin 1
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index fb87e8c936..a179acde7e 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -260,8 +260,7 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
d->config[0x07] = 0x03; // status = medium devsel
d->config[0x08] = 0x00; // revision
d->config[0x09] = 0x00; // programming i/f
- d->config[0x0A] = 0x00; // class_sub = pci host
- d->config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0D] = 0x10; // latency_timer
d->config[0x0E] = 0x00; // header_type
diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c
index e8ea7a878e..d261e40eba 100644
--- a/hw/cirrus_vga.c
+++ b/hw/cirrus_vga.c
@@ -3378,8 +3378,7 @@ void pci_cirrus_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_CIRRUS);
pci_config_set_device_id(pci_conf, device_id);
pci_conf[0x04] = PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS;
- pci_conf[0x0a] = PCI_CLASS_SUB_VGA;
- pci_conf[0x0b] = PCI_CLASS_BASE_DISPLAY;
+ pci_config_set_class(pci_conf, PCI_CLASS_DISPLAY_VGA);
pci_conf[0x0e] = PCI_CLASS_HEADERTYPE_00h;
/* setup VGA */
diff --git a/hw/e1000.c b/hw/e1000.c
index a38ab73ef5..6f841d66a8 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -1054,8 +1054,7 @@ pci_e1000_init(PCIBus *bus, NICInfo *nd, int devfn)
*(uint16_t *)(pci_conf+0x04) = cpu_to_le16(0x0407);
*(uint16_t *)(pci_conf+0x06) = cpu_to_le16(0x0010);
pci_conf[0x08] = 0x03;
- pci_conf[0x0a] = 0x00; // ethernet network controller
- pci_conf[0x0b] = 0x02;
+ pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
pci_conf[0x0c] = 0x10;
pci_conf[0x3d] = 1; // interrupt pin 0
diff --git a/hw/eepro100.c b/hw/eepro100.c
index 96a68041d9..b8709b00a2 100644
--- a/hw/eepro100.c
+++ b/hw/eepro100.c
@@ -433,8 +433,7 @@ static void pci_reset(EEPRO100State * s)
PCI_CONFIG_8(PCI_REVISION_ID, 0x08);
/* PCI Class Code */
PCI_CONFIG_8(0x09, 0x00);
- PCI_CONFIG_8(PCI_SUBCLASS_CODE, 0x00); // ethernet network controller
- PCI_CONFIG_8(PCI_CLASS_CODE, 0x02); // network controller
+ pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
/* PCI Cache Line Size */
/* check cache line size!!! */
//~ PCI_CONFIG_8(0x0c, 0x00);
diff --git a/hw/es1370.c b/hw/es1370.c
index ddd00d881d..50f5a552ed 100644
--- a/hw/es1370.c
+++ b/hw/es1370.c
@@ -1034,8 +1034,7 @@ int es1370_init (PCIBus *bus, AudioState *audio)
pci_config_set_vendor_id(c, PCI_VENDOR_ID_ENSONIQ);
pci_config_set_device_id(c, PCI_DEVICE_ID_ENSONIQ_ES1370);
c[0x07] = 2 << 1;
- c[0x0a] = 0x01;
- c[0x0b] = 0x04;
+ pci_config_set_class(c, PCI_CLASS_MULTIMEDIA_AUDIO);
#if 1
c[0x2c] = 0x42;
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index 40c73df3ea..5161727917 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -148,8 +148,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_MPC106);
d->config[0x08] = 0x00; // revision
d->config[0x09] = 0x01;
- d->config[0x0a] = 0x00; // class_sub = host
- d->config[0x0b] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0e] = 0x00; // header_type
#if 0
@@ -157,8 +156,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154);
d->config[0x08] = 0x02; // revision
- d->config[0x0a] = 0x04; // class_sub = pci2pci
- d->config[0x0b] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI);
d->config[0x0e] = 0x01; // header_type
d->config[0x18] = 0x0; // primary_bus
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index f9e6e0c7bf..53014bcb46 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -1146,8 +1146,7 @@ PCIBus *pci_gt64120_init(qemu_irq *pic)
d->config[0x08] = 0x10;
d->config[0x09] = 0x00;
- d->config[0x0A] = 0x00;
- d->config[0x0B] = 0x06;
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x10] = 0x08;
d->config[0x14] = 0x08;
diff --git a/hw/ide.c b/hw/ide.c
index 7daff5fa1c..bcaee46a7e 100644
--- a/hw/ide.c
+++ b/hw/ide.c
@@ -3353,8 +3353,7 @@ void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
pci_conf[0x08] = 0x07; // IDE controller revision
pci_conf[0x09] = 0x8f;
- pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
- pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
+ pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
pci_conf[0x0e] = 0x00; // header_type
pci_conf[0x51] = 0x04; // enable IDE0
@@ -3423,8 +3422,7 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_1);
pci_conf[0x09] = 0x80; // legacy ATA mode
- pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
- pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
+ pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
pci_conf[0x0e] = 0x00; // header_type
qemu_register_reset(piix3_reset, d);
@@ -3460,8 +3458,7 @@ void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB);
pci_conf[0x09] = 0x80; // legacy ATA mode
- pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
- pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
+ pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
pci_conf[0x0e] = 0x00; // header_type
qemu_register_reset(piix3_reset, d);
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 021fe88cc5..b42ab84687 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -1979,7 +1979,7 @@ void *lsi_scsi_init(PCIBus *bus, int devfn)
/* PCI device ID (word) */
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_LSI_53C895A);
/* PCI base class code */
- pci_conf[0x0b] = 0x01;
+ pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_SCSI);
/* PCI subsystem ID */
pci_conf[0x2e] = 0x00;
pci_conf[0x2f] = 0x10;
diff --git a/hw/macio.c b/hw/macio.c
index f97dc2bfca..1333aa3828 100644
--- a/hw/macio.c
+++ b/hw/macio.c
@@ -109,9 +109,7 @@ void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, device_id);
-
- d->config[0x0a] = 0x00; // class_sub = pci2pci
- d->config[0x0b] = 0xff; // class_base = bridge
+ pci_config_set_class(d->config, PCI_CLASS_OTHERS << 8);
d->config[0x0e] = 0x00; // header_type
d->config[0x3d] = 0x01; // interrupt on pin 1
diff --git a/hw/ne2000.c b/hw/ne2000.c
index 4515fd6305..1bad3fdf78 100644
--- a/hw/ne2000.c
+++ b/hw/ne2000.c
@@ -792,8 +792,7 @@ void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn)
pci_conf = d->dev.config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_RTL8029);
- pci_conf[0x0a] = 0x00; // ethernet network controller
- pci_conf[0x0b] = 0x02;
+ pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
pci_conf[0x0e] = 0x00; // header_type
pci_conf[0x3d] = 1; // interrupt pin 0
diff --git a/hw/openpic.c b/hw/openpic.c
index 16b33d2b1b..e232c32034 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -1019,8 +1019,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
pci_conf = opp->pci_dev.config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_IBM_OPENPIC2);
- pci_conf[0x0a] = 0x80; // PIC
- pci_conf[0x0b] = 0x08;
+ pci_config_set_class(pci_conf, PCI_CLASS_SYSTEM_OTHER); // FIXME?
pci_conf[0x0e] = 0x00; // header_type
pci_conf[0x3d] = 0x00; // no interrupt pin
diff --git a/hw/pci.c b/hw/pci.c
index 1afcbd0fed..c778948ad1 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -729,8 +729,7 @@ PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
s->dev.config[0x07] = 0x00; // status = fast devsel
s->dev.config[0x08] = 0x00; // revision
s->dev.config[0x09] = 0x00; // programming i/f
- s->dev.config[0x0A] = 0x04; // class_sub = PCI to PCI bridge
- s->dev.config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(s->dev.config, PCI_CLASS_BRIDGE_PCI);
s->dev.config[0x0D] = 0x10; // latency_timer
s->dev.config[0x0E] = 0x81; // header_type
s->dev.config[0x1E] = 0xa0; // secondary status
diff --git a/hw/pci.h b/hw/pci.h
index 7ed958b561..edb0594924 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -8,6 +8,36 @@
extern target_phys_addr_t pci_mem_base;
+/* Device classes and subclasses */
+
+#define PCI_CLASS_STORAGE_SCSI 0x0100
+#define PCI_CLASS_STORAGE_IDE 0x0101
+#define PCI_CLASS_STORAGE_OTHER 0x0180
+
+#define PCI_CLASS_NETWORK_ETHERNET 0x0200
+
+#define PCI_CLASS_DISPLAY_VGA 0x0300
+#define PCI_CLASS_DISPLAY_OTHER 0x0380
+
+#define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401
+
+#define PCI_CLASS_MEMORY_RAM 0x0500
+
+#define PCI_CLASS_SYSTEM_OTHER 0x0880
+
+#define PCI_CLASS_SERIAL_USB 0x0c03
+
+#define PCI_CLASS_BRIDGE_HOST 0x0600
+#define PCI_CLASS_BRIDGE_ISA 0x0601
+#define PCI_CLASS_BRIDGE_PCI 0x0604
+#define PCI_CLASS_BRIDGE_OTHER 0x0680
+
+#define PCI_CLASS_PROCESSOR_CO 0x0b40
+
+#define PCI_CLASS_OTHERS 0xff
+
+/* Vendors and devices. */
+
#define PCI_VENDOR_ID_LSI_LOGIC 0x1000
#define PCI_DEVICE_ID_LSI_53C895A 0x0012
@@ -209,6 +239,12 @@ pci_config_set_device_id(uint8_t *pci_config, uint16_t val)
cpu_to_le16wu((uint16_t *)&pci_config[PCI_DEVICE_ID], val);
}
+static inline void
+pci_config_set_class(uint8_t *pci_config, uint16_t val)
+{
+ cpu_to_le16wu((uint16_t *)&pci_config[PCI_CLASS_DEVICE], val);
+}
+
/* lsi53c895a.c */
#define LSI_MAX_DEVS 7
void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
diff --git a/hw/pcnet.c b/hw/pcnet.c
index e348222476..828d980195 100644
--- a/hw/pcnet.c
+++ b/hw/pcnet.c
@@ -2006,8 +2006,7 @@ void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn)
*(uint16_t *)&pci_conf[0x06] = cpu_to_le16(0x0280);
pci_conf[0x08] = 0x10;
pci_conf[0x09] = 0x00;
- pci_conf[0x0a] = 0x00; // ethernet network controller
- pci_conf[0x0b] = 0x02;
+ pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
pci_conf[0x0e] = 0x00; // header_type
*(uint32_t *)&pci_conf[0x10] = cpu_to_le32(0x00000001);
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index c5e73c2f8f..53e20a0ab8 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -195,8 +195,7 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_INTEL_82441);
d->config[0x08] = 0x02; // revision
- d->config[0x0a] = 0x00; // class_sub = host2pci
- d->config[0x0b] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0e] = 0x00; // header_type
d->config[0x72] = 0x02; /* SMRAM */
@@ -337,8 +336,7 @@ int piix3_init(PCIBus *bus, int devfn)
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_0); // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
- pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA
- pci_conf[0x0b] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
piix3_reset(d);
@@ -359,8 +357,7 @@ int piix4_init(PCIBus *bus, int devfn)
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_0); // 82371AB/EB/MB PIIX4 PCI-to-ISA bridge
- pci_conf[0x0a] = 0x01; // class_sub = PCI_ISA
- pci_conf[0x0b] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
piix4_reset(d);
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index 7d40b91a48..574ec19139 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -382,8 +382,7 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4],
pci_conf = controller->pci_dev->config;
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_IBM);
pci_config_set_device_id(pci_conf, 0x027f); // device_id
- pci_conf[0x0a] = 0x80; // class_sub = other bridge type
- pci_conf[0x0b] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER);
/* CFGADDR */
index = cpu_register_io_memory(0, pci4xx_cfgaddr_read,
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index 39c812d51c..2055005644 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -158,8 +158,7 @@ PCIBus *pci_prep_init(qemu_irq *pic)
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_RAVEN);
d->config[0x08] = 0x00; // revision
- d->config[0x0A] = 0x00; // class_sub = pci host
- d->config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0C] = 0x08; // cache_line_size
d->config[0x0D] = 0x10; // latency_timer
d->config[0x0E] = 0x00; // header_type
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index d88fb529eb..59b0cc74ab 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -3429,8 +3429,7 @@ void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_REALTEK_8139);
pci_conf[0x04] = 0x05; /* command = I/O space, Bus Master */
pci_conf[0x08] = RTL8139_PCI_REVID; /* PCI revision ID; >=0x20 is for 8139C+ */
- pci_conf[0x0a] = 0x00; /* ethernet network controller */
- pci_conf[0x0b] = 0x02;
+ pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
pci_conf[0x0e] = 0x00; /* header_type */
pci_conf[0x3d] = 1; /* interrupt pin 0 */
pci_conf[0x34] = 0xdc;
diff --git a/hw/sun4u.c b/hw/sun4u.c
index ac6bf0e15b..234df7a66b 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -373,8 +373,7 @@ pci_ebus_init(PCIBus *bus, int devfn)
s->config[0x07] = 0x03; // status = medium devsel
s->config[0x08] = 0x01; // revision
s->config[0x09] = 0x00; // programming i/f
- s->config[0x0A] = 0x80; // class_sub = misc bridge
- s->config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(s->config, PCI_CLASS_BRIDGE_OTHER);
s->config[0x0D] = 0x0a; // latency_timer
s->config[0x0E] = 0x00; // header_type
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 2a8a393f03..3af2d5cee6 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -177,8 +177,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_PCI);
d->config[0x08] = 0x00; // revision
- d->config[0x0A] = 0x00; // class_sub = pci host
- d->config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0C] = 0x08; // cache_line_size
d->config[0x0D] = 0x10; // latency_timer
d->config[0x0E] = 0x00; // header_type
@@ -191,8 +190,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154);
d->config[0x08] = 0x05; // revision
- d->config[0x0A] = 0x04; // class_sub = pci2pci
- d->config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI);
d->config[0x0C] = 0x08; // cache_line_size
d->config[0x0D] = 0x20; // latency_timer
d->config[0x0E] = 0x01; // header_type
@@ -228,8 +226,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP);
d->config[0x08] = 0x00; // revision
- d->config[0x0A] = 0x00; // class_sub = pci host
- d->config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0C] = 0x08; // cache_line_size
d->config[0x0D] = 0x10; // latency_timer
d->config[0x0E] = 0x00; // header_type
@@ -251,8 +248,7 @@ PCIBus *pci_pmac_init(qemu_irq *pic)
pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI);
d->config[0x08] = 0x00; // revision
- d->config[0x0A] = 0x00; // class_sub = pci host
- d->config[0x0B] = 0x06; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
d->config[0x0C] = 0x08; // cache_line_size
d->config[0x0D] = 0x10; // latency_timer
d->config[0x0E] = 0x00; // header_type
diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c
index e3d8db650b..6ddc2aae7e 100644
--- a/hw/usb-ohci.c
+++ b/hw/usb-ohci.c
@@ -1682,8 +1682,7 @@ void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn)
pci_config_set_vendor_id(ohci->pci_dev.config, PCI_VENDOR_ID_APPLE);
pci_config_set_device_id(ohci->pci_dev.config, 0x003f); // device_id
ohci->pci_dev.config[0x09] = 0x10; /* OHCI */
- ohci->pci_dev.config[0x0a] = 0x3;
- ohci->pci_dev.config[0x0b] = 0xc;
+ pci_config_set_class(ohci->pci_dev.config, PCI_CLASS_SERIAL_USB);
ohci->pci_dev.config[0x3d] = 0x01; /* interrupt pin 1 */
usb_ohci_init(&ohci->state, num_ports, devfn, ohci->pci_dev.irq[0],
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index 55121891ce..89b357ea7c 100644
--- a/hw/usb-uhci.c
+++ b/hw/usb-uhci.c
@@ -1084,8 +1084,7 @@ void usb_uhci_piix3_init(PCIBus *bus, int devfn)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_2);
pci_conf[0x08] = 0x01; // revision number
pci_conf[0x09] = 0x00;
- pci_conf[0x0a] = 0x03;
- pci_conf[0x0b] = 0x0c;
+ pci_config_set_class(pci_conf, PCI_CLASS_SERIAL_USB);
pci_conf[0x0e] = 0x00; // header_type
pci_conf[0x3d] = 4; // interrupt pin 3
pci_conf[0x60] = 0x10; // release number
@@ -1119,8 +1118,7 @@ void usb_uhci_piix4_init(PCIBus *bus, int devfn)
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_2);
pci_conf[0x08] = 0x01; // revision number
pci_conf[0x09] = 0x00;
- pci_conf[0x0a] = 0x03;
- pci_conf[0x0b] = 0x0c;
+ pci_config_set_class(pci_conf, PCI_CLASS_SERIAL_USB);
pci_conf[0x0e] = 0x00; // header_type
pci_conf[0x3d] = 4; // interrupt pin 3
pci_conf[0x60] = 0x10; // release number
diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c
index 13803fe652..dea04ea6de 100644
--- a/hw/versatile_pci.c
+++ b/hw/versatile_pci.c
@@ -133,8 +133,7 @@ PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview)
d->config[0x07] = 0x02;
d->config[0x08] = 0x00; // revision
d->config[0x09] = 0x00; // programming i/f
- d->config[0x0A] = 0x40; // class_sub = pci host
- d->config[0x0B] = 0x0b; // class_base = PCI_bridge
+ pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_CO);
d->config[0x0D] = 0x10; // latency_timer
return s;
diff --git a/hw/vga.c b/hw/vga.c
index ed0dee6828..bad120ba40 100644
--- a/hw/vga.c
+++ b/hw/vga.c
@@ -2513,8 +2513,7 @@ int pci_vga_init(PCIBus *bus, uint8_t *vga_ram_base,
// dummy VGA (same as Bochs ID)
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_QEMU);
pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_QEMU_VGA);
- pci_conf[0x0a] = 0x00; // VGA controller
- pci_conf[0x0b] = 0x03;
+ pci_config_set_class(pci_conf, PCI_CLASS_DISPLAY_VGA);
pci_conf[0x0e] = 0x00; // header_type
/* XXX: vga_ram_size must be a power of two */
diff --git a/hw/virtio-balloon.c b/hw/virtio-balloon.c
index 696a108667..0274bf6fc4 100644
--- a/hw/virtio-balloon.c
+++ b/hw/virtio-balloon.c
@@ -176,7 +176,7 @@ void *virtio_balloon_init(PCIBus *bus)
PCI_DEVICE_ID_VIRTIO_BALLOON,
PCI_VENDOR_ID_REDHAT_QUMRANET,
VIRTIO_ID_BALLOON,
- 0x05, 0x00, 0x00,
+ PCI_CLASS_MEMORY_RAM, 0x00,
8, sizeof(VirtIOBalloon));
if (s == NULL)
return NULL;
diff --git a/hw/virtio-blk.c b/hw/virtio-blk.c
index afb4ab7881..e74455b827 100644
--- a/hw/virtio-blk.c
+++ b/hw/virtio-blk.c
@@ -305,7 +305,7 @@ void *virtio_blk_init(PCIBus *bus, BlockDriverState *bs)
PCI_DEVICE_ID_VIRTIO_BLOCK,
PCI_VENDOR_ID_REDHAT_QUMRANET,
VIRTIO_ID_BLOCK,
- 0x01, 0x80, 0x00,
+ PCI_CLASS_STORAGE_OTHER, 0x00,
sizeof(struct virtio_blk_config), sizeof(VirtIOBlock));
if (!s)
return NULL;
diff --git a/hw/virtio-console.c b/hw/virtio-console.c
index 333ffb1a41..92455c850f 100644
--- a/hw/virtio-console.c
+++ b/hw/virtio-console.c
@@ -130,7 +130,7 @@ void *virtio_console_init(PCIBus *bus, CharDriverState *chr)
PCI_DEVICE_ID_VIRTIO_CONSOLE,
PCI_VENDOR_ID_REDHAT_QUMRANET,
VIRTIO_ID_CONSOLE,
- 0x03, 0x80, 0x00,
+ PCI_CLASS_DISPLAY_OTHER, 0x00,
0, sizeof(VirtIOConsole));
if (s == NULL)
return NULL;
diff --git a/hw/virtio-net.c b/hw/virtio-net.c
index 28f9280d12..9e4067844a 100644
--- a/hw/virtio-net.c
+++ b/hw/virtio-net.c
@@ -325,7 +325,7 @@ void virtio_net_init(PCIBus *bus, NICInfo *nd, int devfn)
PCI_DEVICE_ID_VIRTIO_NET,
PCI_VENDOR_ID_REDHAT_QUMRANET,
VIRTIO_ID_NET,
- 0x02, 0x00, 0x00,
+ PCI_CLASS_NETWORK_ETHERNET, 0x00,
sizeof(struct virtio_net_config),
sizeof(VirtIONet));
if (!n)
diff --git a/hw/virtio.c b/hw/virtio.c
index bb941eda75..cc8314da62 100644
--- a/hw/virtio.c
+++ b/hw/virtio.c
@@ -811,9 +811,8 @@ void virtio_load(VirtIODevice *vdev, QEMUFile *f)
VirtIODevice *virtio_init_pci(PCIBus *bus, const char *name,
uint16_t vendor, uint16_t device,
uint16_t subvendor, uint16_t subdevice,
- uint8_t class_code, uint8_t subclass_code,
- uint8_t pif, size_t config_size,
- size_t struct_size)
+ uint16_t class_code, uint8_t pif,
+ size_t config_size, size_t struct_size)
{
VirtIODevice *vdev;
PCIDevice *pci_dev;
@@ -839,8 +838,7 @@ VirtIODevice *virtio_init_pci(PCIBus *bus, const char *name,
config[0x08] = VIRTIO_PCI_ABI_VERSION;
config[0x09] = pif;
- config[0x0a] = subclass_code;
- config[0x0b] = class_code;
+ pci_config_set_class(config, class_code);
config[0x0e] = 0x00;
config[0x2c] = subvendor & 0xFF;
diff --git a/hw/virtio.h b/hw/virtio.h
index 83511e2cb0..18c7a1a7c7 100644
--- a/hw/virtio.h
+++ b/hw/virtio.h
@@ -92,9 +92,8 @@ struct VirtIODevice
VirtIODevice *virtio_init_pci(PCIBus *bus, const char *name,
uint16_t vendor, uint16_t device,
uint16_t subvendor, uint16_t subdevice,
- uint8_t class_code, uint8_t subclass_code,
- uint8_t pif, size_t config_size,
- size_t struct_size);
+ uint16_t class_code, uint8_t pif,
+ size_t config_size, size_t struct_size);
VirtQueue *virtio_add_queue(VirtIODevice *vdev, int queue_size,
void (*handle_output)(VirtIODevice *,
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index 1f03886033..d1cba28a3f 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -1204,8 +1204,6 @@ static void pci_vmsvga_map_mem(PCIDevice *pci_dev, int region_num,
iomemtype);
}
-#define PCI_CLASS_BASE_DISPLAY 0x03
-#define PCI_CLASS_SUB_VGA 0x00
#define PCI_CLASS_HEADERTYPE_00h 0x00
void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
@@ -1220,8 +1218,7 @@ void pci_vmsvga_init(PCIBus *bus, uint8_t *vga_ram_base,
pci_config_set_vendor_id(s->card.config, PCI_VENDOR_ID_VMWARE);
pci_config_set_device_id(s->card.config, SVGA_PCI_DEVICE_ID);
s->card.config[PCI_COMMAND] = 0x07; /* I/O + Memory */
- s->card.config[PCI_CLASS_DEVICE] = PCI_CLASS_SUB_VGA;
- s->card.config[0x0b] = PCI_CLASS_BASE_DISPLAY;
+ pci_config_set_class(s->card.config, PCI_CLASS_DISPLAY_VGA);
s->card.config[0x0c] = 0x08; /* Cache line size */
s->card.config[0x0d] = 0x40; /* Latency timer */
s->card.config[0x0e] = PCI_CLASS_HEADERTYPE_00h;
generated by cgit v1.2.3 (git 2.26.2) at 2024-11-24 23:09:33 +0000