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-rw-r--r--exec.c7
-rw-r--r--hw/i386/acpi-build.c5
-rw-r--r--hw/pci-host/piix.c9
-rw-r--r--hw/pci-host/q35.c10
-rw-r--r--hw/pci/pci.c26
-rw-r--r--hw/ppc/ppc440_bamboo.c3
-rw-r--r--include/hw/i386/pc.h16
-rw-r--r--include/hw/loader.h2
-rw-r--r--include/hw/pci-host/q35.h1
-rw-r--r--include/hw/pci/pci_bus.h1
10 files changed, 42 insertions, 38 deletions
diff --git a/exec.c b/exec.c
index 6492b0c24c..95c4356c65 100644
--- a/exec.c
+++ b/exec.c
@@ -1743,12 +1743,7 @@ void address_space_destroy_dispatch(AddressSpace *as)
static void memory_map_init(void)
{
system_memory = g_malloc(sizeof(*system_memory));
-
- assert(TARGET_PHYS_ADDR_SPACE_BITS <= 64);
-
- memory_region_init(system_memory, NULL, "system",
- TARGET_PHYS_ADDR_SPACE_BITS == 64 ?
- UINT64_MAX : (0x1ULL << TARGET_PHYS_ADDR_SPACE_BITS));
+ memory_region_init(system_memory, NULL, "system", INT64_MAX);
address_space_init(&address_space_memory, system_memory, "memory");
system_io = g_malloc(sizeof(*system_io));
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6cfa0446ac..486e7055a6 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1182,6 +1182,11 @@ void acpi_setup(PcGuestInfo *guest_info)
return;
}
+ if (!acpi_enabled) {
+ ACPI_BUILD_DPRINTF(3, "ACPI disabled. Bailing out.\n");
+ return;
+ }
+
build_state = g_malloc0(sizeof *build_state);
build_state->guest_info = guest_info;
diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c
index bad3953fb5..edc974ece3 100644
--- a/hw/pci-host/piix.c
+++ b/hw/pci-host/piix.c
@@ -48,6 +48,7 @@ typedef struct I440FXState {
PCIHostState parent_obj;
PcPciInfo pci_info;
uint64_t pci_hole64_size;
+ uint32_t short_root_bus;
} I440FXState;
#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
@@ -720,13 +721,19 @@ static const TypeInfo i440fx_info = {
static const char *i440fx_pcihost_root_bus_path(PCIHostState *host_bridge,
PCIBus *rootbus)
{
+ I440FXState *s = I440FX_PCI_HOST_BRIDGE(host_bridge);
+
/* For backwards compat with old device paths */
- return "0000";
+ if (s->short_root_bus) {
+ return "0000";
+ }
+ return "0000:00";
}
static Property i440fx_props[] = {
DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, I440FXState,
pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE),
+ DEFINE_PROP_UINT32("short_root_bus", I440FXState, short_root_bus, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index b8feed1254..c043998e32 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -61,8 +61,13 @@ static void q35_host_realize(DeviceState *dev, Error **errp)
static const char *q35_host_root_bus_path(PCIHostState *host_bridge,
PCIBus *rootbus)
{
- /* For backwards compat with old device paths */
- return "0000";
+ Q35PCIHost *s = Q35_HOST_DEVICE(host_bridge);
+
+ /* For backwards compat with old device paths */
+ if (s->mch.short_root_bus) {
+ return "0000";
+ }
+ return "0000:00";
}
static void q35_host_get_pci_hole_start(Object *obj, Visitor *v,
@@ -124,6 +129,7 @@ static Property mch_props[] = {
MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT),
DEFINE_PROP_SIZE(PCI_HOST_PROP_PCI_HOLE64_SIZE, Q35PCIHost,
mch.pci_hole64_size, DEFAULT_PCI_HOLE64_SIZE),
+ DEFINE_PROP_UINT32("short_root_bus", Q35PCIHost, mch.short_root_bus, 0),
DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index a98c8a0580..ed32059bf8 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -283,24 +283,6 @@ const char *pci_root_bus_path(PCIDevice *dev)
return rootbus->qbus.name;
}
-static uint64_t master_abort_mem_read(void *opaque, hwaddr addr, unsigned size)
-{
- return -1ULL;
-}
-
-static void master_abort_mem_write(void *opaque, hwaddr addr, uint64_t val,
- unsigned size)
-{
-}
-
-static const MemoryRegionOps master_abort_mem_ops = {
- .read = master_abort_mem_read,
- .write = master_abort_mem_write,
- .endianness = DEVICE_LITTLE_ENDIAN,
-};
-
-#define MASTER_ABORT_MEM_PRIORITY INT_MIN
-
static void pci_bus_init(PCIBus *bus, DeviceState *parent,
const char *name,
MemoryRegion *address_space_mem,
@@ -312,14 +294,6 @@ static void pci_bus_init(PCIBus *bus, DeviceState *parent,
bus->address_space_mem = address_space_mem;
bus->address_space_io = address_space_io;
-
- memory_region_init_io(&bus->master_abort_mem, OBJECT(bus),
- &master_abort_mem_ops, bus, "pci-master-abort",
- memory_region_size(bus->address_space_mem));
- memory_region_add_subregion_overlap(bus->address_space_mem,
- 0, &bus->master_abort_mem,
- MASTER_ABORT_MEM_PRIORITY);
-
/* host bridge */
QLIST_INIT(&bus->child);
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 655e49906d..67597dfb88 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
@@ -110,8 +110,9 @@ static int bamboo_load_device_tree(hwaddr addr,
qemu_devtree_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency",
tb_freq);
- ret = rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
+ rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr);
g_free(fdt);
+ return 0;
out:
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 03cc0ba0f7..57e8d16180 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -260,6 +260,14 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
.driver = "qemu32-" TYPE_X86_CPU,\
.property = "model",\
.value = stringify(3),\
+ },{\
+ .driver = "i440FX-pcihost",\
+ .property = "short_root_bus",\
+ .value = stringify(1),\
+ },{\
+ .driver = "q35-pcihost",\
+ .property = "short_root_bus",\
+ .value = stringify(1),\
}
#define PC_COMPAT_1_5 \
@@ -296,6 +304,14 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
.driver = TYPE_X86_CPU,\
.property = "pmu",\
.value = "on",\
+ },{\
+ .driver = "i440FX-pcihost",\
+ .property = "short_root_bus",\
+ .value = stringify(0),\
+ },{\
+ .driver = "q35-pcihost",\
+ .property = "short_root_bus",\
+ .value = stringify(0),\
}
#define PC_COMPAT_1_4 \
diff --git a/include/hw/loader.h b/include/hw/loader.h
index 58eca9832b..7a23d6bdc1 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -55,7 +55,7 @@ void do_info_roms(Monitor *mon, const QDict *qdict);
#define rom_add_file_fixed(_f, _a, _i) \
rom_add_file(_f, NULL, _a, _i)
#define rom_add_blob_fixed(_f, _b, _l, _a) \
- (rom_add_blob(_f, _b, _l, _a, NULL, NULL, NULL) ? 0 : -1)
+ rom_add_blob(_f, _b, _l, _a, NULL, NULL, NULL)
#define PC_ROM_MIN_VGA 0xc0000
#define PC_ROM_MIN_OPTION 0xc8000
diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h
index aee91aa038..309065fa41 100644
--- a/include/hw/pci-host/q35.h
+++ b/include/hw/pci-host/q35.h
@@ -61,6 +61,7 @@ typedef struct MCHPCIState {
ram_addr_t above_4g_mem_size;
uint64_t pci_hole64_size;
PcGuestInfo *guest_info;
+ uint32_t short_root_bus;
} MCHPCIState;
typedef struct Q35PCIHost {
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 2ad5edbde9..9df17885ec 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -23,7 +23,6 @@ struct PCIBus {
PCIDevice *parent_dev;
MemoryRegion *address_space_mem;
MemoryRegion *address_space_io;
- MemoryRegion master_abort_mem;
QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-22 19:25:39 +0000