diff options
| -rw-r--r-- | docs/specs/fw_cfg.txt | 9 | ||||
| -rw-r--r-- | hw/arm/virt-acpi-build.c | 15 | ||||
| -rw-r--r-- | hw/i386/acpi-build.c | 29 | ||||
| -rw-r--r-- | hw/i386/pc.c | 5 | ||||
| -rw-r--r-- | hw/nvram/fw_cfg.c | 4 | ||||
| -rw-r--r-- | include/hw/i386/pc.h | 2 | ||||
| -rw-r--r-- | include/hw/nvram/fw_cfg.h | 3 | ||||
| -rw-r--r-- | tests/acpi-test-data/pc/DSDT | bin | 5478 -> 5538 bytes | |||
| -rw-r--r-- | tests/acpi-test-data/pc/DSDT.bridge | bin | 7337 -> 7397 bytes | |||
| -rw-r--r-- | tests/acpi-test-data/q35/DSDT | bin | 8321 -> 8381 bytes | |||
| -rw-r--r-- | tests/acpi-test-data/q35/DSDT.bridge | bin | 8338 -> 8398 bytes |
11 files changed, 63 insertions, 4 deletions
diff --git a/docs/specs/fw_cfg.txt b/docs/specs/fw_cfg.txt index 2099ad9a4d..5414140f33 100644 --- a/docs/specs/fw_cfg.txt +++ b/docs/specs/fw_cfg.txt @@ -84,6 +84,15 @@ Selector Register address: Base + 8 (2 bytes) Data Register address: Base + 0 (8 bytes) DMA Address address: Base + 16 (8 bytes) +== ACPI Interface == + +The fw_cfg device is defined with ACPI ID "QEMU0002". Since we expect +ACPI tables to be passed into the guest through the fw_cfg device itself, +the guest-side firmware can not use ACPI to find fw_cfg. However, once the +firmware is finished setting up ACPI tables and hands control over to the +guest kernel, the latter can use the fw_cfg ACPI node for a more accurate +inventory of in-use IOport or MMIO regions. + == Firmware Configuration Items == === Signature (Key 0x0000, FW_CFG_SIGNATURE) === diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index b8b3ece8ca..6a86b2ca2c 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -81,6 +81,20 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap, aml_append(scope, dev); } +static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap) +{ + Aml *dev = aml_device("FWCF"); + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + + Aml *crs = aml_resource_template(); + aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, + fw_cfg_memmap->size, AML_READ_WRITE)); + aml_append(dev, aml_name_decl("_CRS", crs)); + aml_append(scope, dev); +} + static void acpi_dsdt_add_flash(Aml *scope, const MemMapEntry *flash_memmap) { Aml *dev, *crs; @@ -549,6 +563,7 @@ build_dsdt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info) acpi_dsdt_add_uart(scope, &memmap[VIRT_UART], (irqmap[VIRT_UART] + ARM_SPI_BASE)); acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); + acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]); acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO], (irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS); acpi_dsdt_add_pci(scope, memmap, (irqmap[VIRT_PCIE] + ARM_SPI_BASE), diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 52c9470a54..b888008839 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2190,6 +2190,35 @@ build_dsdt(GArray *table_data, GArray *linker, aml_append(scope, aml_name_decl("_S5", pkg)); aml_append(dsdt, scope); + /* create fw_cfg node, unconditionally */ + { + /* when using port i/o, the 8-bit data register *always* overlaps + * with half of the 16-bit control register. Hence, the total size + * of the i/o region used is FW_CFG_CTL_SIZE; when using DMA, the + * DMA control register is located at FW_CFG_DMA_IO_BASE + 4 */ + uint8_t io_size = object_property_get_bool(OBJECT(pcms->fw_cfg), + "dma_enabled", NULL) ? + ROUND_UP(FW_CFG_CTL_SIZE, 4) + sizeof(dma_addr_t) : + FW_CFG_CTL_SIZE; + + scope = aml_scope("\\_SB.PCI0"); + dev = aml_device("FWCF"); + + aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); + + /* device present, functioning, decoding, not shown in UI */ + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + + crs = aml_resource_template(); + aml_append(crs, + aml_io(AML_DECODE16, FW_CFG_IO_BASE, FW_CFG_IO_BASE, 0x01, io_size) + ); + aml_append(dev, aml_name_decl("_CRS", crs)); + + aml_append(scope, dev); + aml_append(dsdt, scope); + } + if (misc->applesmc_io_base) { scope = aml_scope("\\_SB.PCI0.ISA"); dev = aml_device("SMC"); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0aeefd2c0d..56ec6cd6c6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -78,7 +78,6 @@ #define DPRINTF(fmt, ...) #endif -#define BIOS_CFG_IOPORT 0x510 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0) #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1) #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2) @@ -756,7 +755,7 @@ static FWCfgState *bochs_bios_init(AddressSpace *as) int i, j; unsigned int apic_id_limit = pc_apic_id_limit(max_cpus); - fw_cfg = fw_cfg_init_io_dma(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 4, as); + fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as); /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86: * @@ -1258,7 +1257,7 @@ void xen_load_linux(PCMachineState *pcms) assert(MACHINE(pcms)->kernel_filename != NULL); - fw_cfg = fw_cfg_init_io(BIOS_CFG_IOPORT); + fw_cfg = fw_cfg_init_io(FW_CFG_IO_BASE); rom_set_fw(fw_cfg); load_linux(pcms, fw_cfg); diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index f3acb47bd4..7866248b93 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -32,7 +32,6 @@ #include "qemu/error-report.h" #include "qemu/config-file.h" -#define FW_CFG_CTL_SIZE 2 #define FW_CFG_NAME "fw_cfg" #define FW_CFG_PATH "/machine/" FW_CFG_NAME @@ -886,6 +885,9 @@ static void fw_cfg_io_realize(DeviceState *dev, Error **errp) FWCfgIoState *s = FW_CFG_IO(dev); SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + /* when using port i/o, the 8-bit data register ALWAYS overlaps + * with half of the 16-bit control register. Hence, the total size + * of the i/o region used is FW_CFG_CTL_SIZE */ memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops, FW_CFG(s), "fwcfg", FW_CFG_CTL_SIZE); sysbus_add_io(sbd, s->iobase, &s->comb_iomem); diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 8b3546ed5c..79ffe5b3ee 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -266,6 +266,8 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); ISADevice *pc_find_fdc0(void); +#define FW_CFG_IO_BASE 0x510 + /* acpi_piix.c */ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index 5d19975df5..4315f4e582 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -44,6 +44,9 @@ #define FW_CFG_INVALID 0xffff +/* width in bytes of fw_cfg control register */ +#define FW_CFG_CTL_SIZE 0x02 + #define FW_CFG_MAX_FILE_PATH 56 #ifndef NO_QEMU_PROTOS diff --git a/tests/acpi-test-data/pc/DSDT b/tests/acpi-test-data/pc/DSDT Binary files differindex ec0e642b06..44374e3f57 100644 --- a/tests/acpi-test-data/pc/DSDT +++ b/tests/acpi-test-data/pc/DSDT diff --git a/tests/acpi-test-data/pc/DSDT.bridge b/tests/acpi-test-data/pc/DSDT.bridge Binary files differindex 7b1c14b529..c9a6230983 100644 --- a/tests/acpi-test-data/pc/DSDT.bridge +++ b/tests/acpi-test-data/pc/DSDT.bridge diff --git a/tests/acpi-test-data/q35/DSDT b/tests/acpi-test-data/q35/DSDT Binary files differindex b492f04b88..a90c52a4c3 100644 --- a/tests/acpi-test-data/q35/DSDT +++ b/tests/acpi-test-data/q35/DSDT diff --git a/tests/acpi-test-data/q35/DSDT.bridge b/tests/acpi-test-data/q35/DSDT.bridge Binary files differindex 3b72e250fa..6fd2ef308b 100644 --- a/tests/acpi-test-data/q35/DSDT.bridge +++ b/tests/acpi-test-data/q35/DSDT.bridge |