diff options
| -rw-r--r-- | target-arm/cpu.h | 9 | ||||
| -rw-r--r-- | target-tricore/cpu.h | 5 | ||||
| -rw-r--r-- | tcg/tcg.h | 6 |
3 files changed, 4 insertions, 16 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 8df0b6a39c..d4a589964e 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1874,15 +1874,6 @@ static inline void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, #include "exec/exec-all.h" -static inline void cpu_pc_from_tb(CPUARMState *env, TranslationBlock *tb) -{ - if (ARM_TBFLAG_AARCH64_STATE(tb->flags)) { - env->pc = tb->pc; - } else { - env->regs[15] = tb->pc; - } -} - enum { QEMU_PSCI_CONDUIT_DISABLED = 0, QEMU_PSCI_CONDUIT_SMC = 1, diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index 90bf0069b5..c14b5f9016 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -395,9 +395,4 @@ int cpu_tricore_handle_mmu_fault(CPUState *cpu, target_ulong address, #include "exec/exec-all.h" -static inline void cpu_pc_from_tb(CPUTriCoreState *env, TranslationBlock *tb) -{ - env->PC = tb->pc; -} - #endif /*__TRICORE_CPU_H__ */ @@ -859,8 +859,10 @@ static inline size_t tcg_current_code_size(TCGContext *s) * state is correctly synchronised and ready for execution of the next * TB (and in particular the guest PC is the address to execute next). * Otherwise, we gave up on execution of this TB before it started, and - * the caller must fix up the CPU state by calling cpu_pc_from_tb() - * with the next-TB pointer we return. + * the caller must fix up the CPU state by calling the CPU's + * synchronize_from_tb() method with the next-TB pointer we return (falling + * back to calling the CPU's set_pc method with tb->pb if no + * synchronize_from_tb() method exists). * * Note that TCG targets may use a different definition of tcg_qemu_tb_exec * to this default (which just calls the prologue.code emitted by |