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author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-12-03 22:00:54 -0800 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2013-12-10 13:28:50 +0000 |
commit | e2314fda62c42c89f91dcf104ed3702170a90308 (patch) | |
tree | 227ea40fb65a1d344b0eb2706c105b7f45b19a68 /xen-all.c | |
parent | 191946c51f28e6ac76e94c7379d5e0f69c016e83 (diff) |
net/cadence_gem: Fix register w1c logic
This write-1-clear logic was incorrect. It was always clearing w1c
bits regardless of whether the written value was 1 or not. i.e. it
was implementing a write-anything-to-clear strategy.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: ed905b04d3343966ded425f06aa2224bc7a35b59.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'xen-all.c')
0 files changed, 0 insertions, 0 deletions