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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-15 23:58:11 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-01-15 23:58:11 +0000 |
commit | 5856de800df5789b8641c47be5399afff7773910 (patch) | |
tree | cd67d1adb6977a0f8c9e0a19cdd4b8f91347228f /vl.h | |
parent | fde7d5bd733fd64bdbf9600d1d5d83c96d004a62 (diff) |
MIPS Malta system and devices support, by Aurelien Jarno and Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2319 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'vl.h')
-rw-r--r-- | vl.h | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -302,6 +302,7 @@ typedef struct CharDriverState { QEMUBH *bh; } CharDriverState; +CharDriverState *qemu_chr_open(const char *filename); void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); void qemu_chr_send_event(CharDriverState *s, int event); @@ -824,6 +825,8 @@ void i440fx_set_smm(PCIDevice *d, int val); int piix3_init(PCIBus *bus, int devfn); void i440fx_init_memory_mappings(PCIDevice *d); +int piix4_init(PCIBus *bus, int devfn); + /* openpic.c */ typedef struct openpic_t openpic_t; void openpic_set_irq(void *opaque, int n_IRQ, int level); @@ -1059,6 +1062,9 @@ extern QEMUMachine heathrow_machine; /* mips_r4k.c */ extern QEMUMachine mips_machine; +/* mips_malta.c */ +extern QEMUMachine mips_malta_machine; + /* mips_timer.c */ extern void cpu_mips_clock_init(CPUState *); extern void cpu_mips_irqctrl_init (void); |