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authorSebastian Huber <sebastian.huber@embedded-brains.de>2011-05-29 02:58:41 +0000
committerPeter Maydell <peter.maydell@linaro.org>2011-06-22 15:02:42 +0000
commit82845826e89fdc02f6f000fca5d5019ec9be4ab3 (patch)
tree6331e9c498b6a2d1d4ed35c16345bca76a626a5a /vl.c
parent74594c9d813e4d14e9c16cc71824d8905bedc19d (diff)
target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access
Correct the decode of the register numbers for BASEPRI, BASEPRI_MAX and FAULTMASK, according to "ARMv7-M Architecture Reference Manual" issue D section "B5.2.3 MRS" and "B5.2.3 MSR". Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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