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author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-10 00:12:14 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-10 00:12:14 +0000 |
commit | c6c99c3f175fa3f7e0d27c57c32b7029648a7407 (patch) | |
tree | f9a43b07daf05343dbf2d6b25ed22785329b3a82 /vl.c | |
parent | 5567025f5352b7177f7040f40c200c6a66aa1cd2 (diff) |
GT64XXX: fix endianness issues:
- Byte swapping for internal GT64XXX registers is controlled by the bit
12 of the Configuration Register and not by the PCI Internal Command
register.
- The bit 0 of the PCI Internal Command register controls byte swapping
for PCI access *except for the internal PCI device*, that is when both
bus and device numbers are 0.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4035 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'vl.c')
0 files changed, 0 insertions, 0 deletions