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authorAlexey Kardashevskiy <aik@ozlabs.ru>2014-06-04 22:50:45 +1000
committerAlexander Graf <agraf@suse.de>2014-06-16 13:24:43 +0200
commit7488d481ce53a546512c959b1a6b0316aaed1f34 (patch)
tree1b299768bceeabc029672cddb76a96b6a956b252 /vl.c
parentba881002194f61598aa8bd33c98a471210e904ef (diff)
target-ppc: Introduce and reuse generalized init_proc_book3s_64()
At the moment every POWER CPU family has its own init_proc_POWERX function. E500 already has common init function so we try to do the same thing. This introduces BOOK3S_CPU_TYPE enum with 2 values - 970 and POWER5+. This introduces generalized init_proc_book3s_64() which accepts a CPU type as a parameter. This uses new init function for 970 and POWER5+ CPU classes. 970 and POWER5+ use the same CPU class initialization except 3 things: 1. logical partitioning is controlled by LPCR (POWER5+) and HID4 (970) SPRs; 2. 970 does not have EAR (External Access Register) SPR and PowerISA 2.03 defines one so keep it only for POWER5+; 3. POWER5+ does not have ALTIVEC so insns_flags does not have PPC_ALTIVEC flag set and gen_spr_book3s_altivec() won't init ALTIVEC for POWER5+. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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