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authorPeter Maydell <peter.maydell@linaro.org>2019-02-01 14:55:42 +0000
committerPeter Maydell <peter.maydell@linaro.org>2019-02-01 14:55:42 +0000
commit4b635cf7a95e5012113570a87e134962a0271a27 (patch)
tree89952d71aacae52c0cbc695eb3222b5c48bc004c /util/qemu-config.c
parentf0cab7fe88e1751209d6f3d8b9bac04b09b2e7ea (diff)
hw/arm/armsse: Make SRAM bank size configurable
For the IoTKit the SRAM bank size is always 32K (15 bits); for the SSE-200 this is a configurable parameter, which defaults to 32K but can be changed when it is built into a particular SoC. For instance the Musca-B1 board sets it to 128K (17 bits). Make the bank size a QOM property. We follow the SSE-200 hardware in naming the parameter SRAM_ADDR_WIDTH, which specifies the number of address bits of a single SRAM bank. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-11-peter.maydell@linaro.org
Diffstat (limited to 'util/qemu-config.c')
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