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author | Peter Maydell <peter.maydell@linaro.org> | 2022-03-03 20:23:41 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2022-03-07 13:16:50 +0000 |
commit | cf734c2a0f6a61dd22639416a5295d0e0fd8a7cd (patch) | |
tree | 257db78a9c95c27b94f0383287c0fb289fa9ed3c /ui/cocoa.m | |
parent | b45f91e1a70e70f482ed75b50e24850591db2e5e (diff) |
hw/intc/arm_gicv3_cpuif: Fix register names in ICV_HPPIR read trace event
The trace_gicv3_icv_hppir_read trace event takes an integer value
which it uses to form the register name, which should be either
ICV_HPPIR0 or ICV_HPPIR1. We were passing in the 'grp' variable for
this, but that is either GICV3_G0 or GICV3_G1NS, which happen to be 0
and 2, which meant that tracing for the ICV_HPPIR1 register was
incorrectly printed as ICV_HPPIR2.
Use the same approach we do for all the other similar trace events,
and pass in 'ri->crm == 8 ? 0 : 1', deriving the index value
directly from the ARMCPRegInfo struct.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220303202341.2232284-6-peter.maydell@linaro.org
Diffstat (limited to 'ui/cocoa.m')
0 files changed, 0 insertions, 0 deletions