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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-06-09 15:29:55 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-06-09 15:29:55 +0000 |
commit | a95c67907cce5b03269581b77f014ec51b98da36 (patch) | |
tree | 9420cb5a39a8c683db1e6ecf13b704cfdc5e7e6d /translate-i386.c | |
parent | 0f533160c7f7ccd1ae421d5bce3850a1a5400bc1 (diff) |
arm support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@221 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'translate-i386.c')
-rw-r--r-- | translate-i386.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/translate-i386.c b/translate-i386.c index 3802c5e925..c7d34b60a8 100644 --- a/translate-i386.c +++ b/translate-i386.c @@ -104,6 +104,16 @@ static void inline flush_icache_range(unsigned long start, unsigned long stop) #endif +#ifdef __arm__ +static inline void flush_icache_range(unsigned long start, unsigned long stop) +{ + register unsigned long _beg __asm ("a1") = start; + register unsigned long _end __asm ("a2") = stop; + register unsigned long _flg __asm ("a3") = 0; + __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg)); +} +#endif + extern FILE *logfile; extern int loglevel; @@ -166,6 +176,7 @@ enum { NB_OPS, }; +#include "dyngen.h" #include "op-i386.h" /* operand size */ |