diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-07-26 20:34:00 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2003-07-26 20:34:00 +0000 |
commit | 8a4c1cc4118720fb69f0e9aa3c15275e13294946 (patch) | |
tree | 5f6e47405e355eb53289b56749d3994f4b780388 /translate-i386.c | |
parent | 330d0414a5968d36edb635c63a729ffa55520e76 (diff) |
fixed ss segment load - added ICEBP instruction
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@339 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'translate-i386.c')
-rw-r--r-- | translate-i386.c | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/translate-i386.c b/translate-i386.c index d5cdee5759..7fce0e24bf 100644 --- a/translate-i386.c +++ b/translate-i386.c @@ -1277,9 +1277,10 @@ static void gen_movl_seg_T0(DisasContext *s, int seg_reg, unsigned int cur_eip) gen_op_movl_seg_T0(seg_reg, cur_eip); else gen_op_movl_seg_T0_vm(offsetof(CPUX86State,segs[seg_reg])); - if (!s->addseg && seg_reg < R_FS) - s->is_jmp = 2; /* abort translation because the register may - have a non zero base */ + /* abort translation because the register may have a non zero base + or because ss32 may change */ + if (seg_reg == R_SS || (!s->addseg && seg_reg < R_FS)) + s->is_jmp = 2; } /* generate a push. It depends on ss32, addseg and dflag */ @@ -3420,6 +3421,9 @@ long disas_insn(DisasContext *s, uint8_t *pc_start) gen_op_set_cc_op(s->cc_op); gen_op_into(s->pc - s->cs_base); break; + case 0xf1: /* icebp (undocumented, exits to external debugger) */ + gen_debug(s, pc_start - s->cs_base); + break; case 0xfa: /* cli */ if (!s->vm86) { if (s->cpl <= s->iopl) { |