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author | Peter Maydell <peter.maydell@linaro.org> | 2014-12-17 16:25:21 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-12-17 16:25:21 +0000 |
commit | 84afc4dd56648ac302c7b5a917e95ca7b1239695 (patch) | |
tree | 7f1905105f79a12f7f83e5bb033f80192ae9070c /translate-all.c | |
parent | 339aaf5b7f26d1e638641c59a44883b7654bd8ea (diff) | |
parent | d4fa5354a246a1c6cb538a5d8ebcc21206d502fb (diff) |
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20141216' into staging
* remotes/lalrae/tags/mips-20141216: (30 commits)
target-mips: remove excp_names[] from linux-user as it is unused
disas/mips: disable unused mips16_to_32_reg_map[]
disas/mips: remove unused mips_msa_control_names_numeric[32]
target-mips: convert single case switch into if statement
target-mips: Fix DisasContext's ulri member initialization
target-mips: Use local float status pointer across MSA macros
target-mips: Add missing calls to synchronise SoftFloat status
linux-user: Use the 5KEf processor for 64-bit emulation
target-mips: Also apply the CP0.Status mask to MTTC0
target-mips: gdbstub: Clean up FPU register handling
target-mips: Correct 32-bit address space wrapping
target-mips: Tighten ISA level checks
target-mips: Fix CP0.Config3.ISAOnExc write accesses
target-mips: Output CP0.Config2-5 in the register dump
target-mips: Fix the 64-bit case for microMIPS MOVE16 and MOVEP
target-mips: Correct the writes to Status and Cause registers via gdbstub
target-mips: Correct the handling of writes to CP0.Status for MIPSr6
target-mips: Correct MIPS16/microMIPS branch size calculation
target-mips: Restore the order of helpers
target-mips: Remove unused `FLOAT_OP' macro
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'translate-all.c')
-rw-r--r-- | translate-all.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/translate-all.c b/translate-all.c index cf05472008..d930a5ce67 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1540,7 +1540,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) branch. */ #if defined(TARGET_MIPS) if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) { - env->active_tc.PC -= 4; + env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); cpu->icount_decr.u16.low++; env->hflags &= ~MIPS_HFLAG_BMASK; } |