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authorHuacai Chen <zltjiangshi@gmail.com>2020-05-03 18:20:17 +0800
committerAleksandar Markovic <aleksandar.qemu.devel@gmail.com>2020-06-01 13:28:21 +0200
commitc3173a35bc2a759dbfac4e76e9a7695b1d44e97a (patch)
treeed928f9c75b04bfa9a4d8f5dffaca754a323d79b /trace
parentaa2953fd169c98c6ef44feb9c7e44eaad7f2808b (diff)
hw/mips: Add CPU IRQ3 delivery for KVM
Currently, KVM/MIPS only deliver I/O interrupt via IP2, this patch add IP3 delivery as well, because Loongson-3 based machine use both IRQ2 (CPU's IP2) and IRQ3 (CPU's IP3). Signed-off-by: Huacai Chen <chenhc@lemote.com> Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <1588501221-1205-4-git-send-email-chenhc@lemote.com>
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