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author | Blue Swirl <blauwirbel@gmail.com> | 2011-10-27 20:27:07 +0000 |
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committer | Blue Swirl <blauwirbel@gmail.com> | 2011-10-27 20:27:07 +0000 |
commit | b5a12aa204f842c8010ac9d2e4b115114dbf09f0 (patch) | |
tree | b68aaa746a014fe70428204fdc682c11c83c7833 /trace-events | |
parent | 9f60639b848944200c3d33a89233d808de0b5a43 (diff) | |
parent | 50c796f9d842bbefeb39ac64d7fe961056ee0267 (diff) |
Merge branch 'rth/vis2' of git://repo.or.cz/qemu/rth
* 'rth/vis2' of git://repo.or.cz/qemu/rth:
target-sparc: Implement FALIGNDATA inline.
target-sparc: Implement BMASK/BSHUFFLE.
target-sparc: Implement ALIGNADDR* inline.
target-sparc: Implement EDGE* instructions.
target-sparc: Implement fpack{16,32,fix}.
target-sparc: Implement PDIST.
target-sparc: Do exceptions management fully inside the helpers.
target-sparc: Change fpr representation to doubles.
target-sparc: Undo cpu_fpr rename.
target-sparc: Extract float128 move to a function.
target-sparc: Extract common code for floating-point operations.
target-sparc: Make FPU/VIS helpers const when possible.
target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
target-sparc: Add accessors for double-precision fpr access.
target-sparc: Mark fprs dirty in store accessor.
target-sparc: Add accessors for single-precision fpr access.
Diffstat (limited to 'trace-events')
0 files changed, 0 insertions, 0 deletions