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| author | Richard Henderson <rth@twiddle.net> | 2016-12-07 10:07:26 -0800 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2017-01-13 11:46:27 -0800 |
| commit | b1eb20da625897244e9621dabcf63d899deca54d (patch) | |
| tree | 0eaf0a879c2b0936228b8027402e590caebd6d15 /trace-events | |
| parent | 86c9ab277615af4e0389eb80a83073873ff96c86 (diff) | |
tcg/aarch64: Fix addsub2 for 0+C
When al == xzr, we cannot use addi/subi because that encodes xsp.
Force a zero into the temp register for that (rare) case.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <20161207180727.6286-2-rth@twiddle.net>
Diffstat (limited to 'trace-events')
0 files changed, 0 insertions, 0 deletions