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authorPeter Maydell <peter.maydell@linaro.org>2021-01-19 15:47:23 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-01-19 15:47:23 +0000
commit48202c712412c803ddb56365c7bca322aa4e7506 (patch)
treed619d954218fd9e75a193d1372e5c34dffe5ae72 /tests
parentf1fcb6851aba6dd9838886dc179717a11e344a1c (diff)
parentb93f4fbdc48283a39089469c44a5529d79dc40a8 (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210119-1' into staging
target-arm queue: * Implement IMPDEF pauth algorithm * Support ARMv8.4-SEL2 * Fix bug where we were truncating predicate vector lengths in SVE insns * npcm7xx_adc-test: Fix memleak in adc_qom_set * target/arm/m_helper: Silence GCC 10 maybe-uninitialized error * docs: Build and install all the docs in a single manual # gpg: Signature made Tue 19 Jan 2021 15:46:34 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210119-1: (29 commits) docs: Build and install all the docs in a single manual target/arm/m_helper: Silence GCC 10 maybe-uninitialized error npcm7xx_adc-test: Fix memleak in adc_qom_set target/arm: Update REV, PUNPK for pred_desc target/arm: Update ZIP, UZP, TRN for pred_desc target/arm: Update PFIRST, PNEXT for pred_desc target/arm: Introduce PREDDESC field definitions target/arm: refactor vae1_tlbmask() target/arm: enable Secure EL2 in max CPU target/arm: Implement SCR_EL2.EEL2 target/arm: revector to run-time pick target EL target/arm: set HPFAR_EL2.NS on secure stage 2 faults target/arm: secure stage 2 translation regime target/arm: generalize 2-stage page-walk condition target/arm: translate NS bit in page-walks target/arm: do S1_ptw_translate() before address space lookup target/arm: handle VMID change in secure state target/arm: add ARMv8.4-SEL2 system registers target/arm: add MMU stage 1 for Secure EL2 target/arm: add 64-bit S-EL2 to EL exception table ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
-rw-r--r--tests/qtest/arm-cpu-features.c13
-rw-r--r--tests/qtest/npcm7xx_adc-test.c1
2 files changed, 14 insertions, 0 deletions
diff --git a/tests/qtest/arm-cpu-features.c b/tests/qtest/arm-cpu-features.c
index bc681a95d5..8252b85bb8 100644
--- a/tests/qtest/arm-cpu-features.c
+++ b/tests/qtest/arm-cpu-features.c
@@ -427,6 +427,18 @@ static void sve_tests_sve_off_kvm(const void *data)
qtest_quit(qts);
}
+static void pauth_tests_default(QTestState *qts, const char *cpu_type)
+{
+ assert_has_feature_enabled(qts, cpu_type, "pauth");
+ assert_has_feature_disabled(qts, cpu_type, "pauth-impdef");
+ assert_set_feature(qts, cpu_type, "pauth", false);
+ assert_set_feature(qts, cpu_type, "pauth", true);
+ assert_set_feature(qts, cpu_type, "pauth-impdef", true);
+ assert_set_feature(qts, cpu_type, "pauth-impdef", false);
+ assert_error(qts, cpu_type, "cannot enable pauth-impdef without pauth",
+ "{ 'pauth': false, 'pauth-impdef': true }");
+}
+
static void test_query_cpu_model_expansion(const void *data)
{
QTestState *qts;
@@ -462,6 +474,7 @@ static void test_query_cpu_model_expansion(const void *data)
assert_has_feature_enabled(qts, "cortex-a57", "aarch64");
sve_tests_default(qts, "max");
+ pauth_tests_default(qts, "max");
/* Test that features that depend on KVM generate errors without. */
assert_error(qts, "max",
diff --git a/tests/qtest/npcm7xx_adc-test.c b/tests/qtest/npcm7xx_adc-test.c
index f029706945..5ce8ce13b3 100644
--- a/tests/qtest/npcm7xx_adc-test.c
+++ b/tests/qtest/npcm7xx_adc-test.c
@@ -129,6 +129,7 @@ static void adc_qom_set(QTestState *qts, const ADC *adc,
path, name, value);
/* The qom set message returns successfully. */
g_assert_true(qdict_haskey(response, "return"));
+ qobject_unref(response);
}
static void adc_write_input(QTestState *qts, const ADC *adc,