diff options
author | Fredrik Noring <noring@nocrew.org> | 2018-12-27 21:25:18 +0100 |
---|---|---|
committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-01-03 17:52:52 +0100 |
commit | 8e2e5e7dacabc4556c5b77ad604569e2bb4fb61c (patch) | |
tree | 5a343961948384f8784115570fcb3339ccd17b8c /tests | |
parent | 84dc07123611572159f76b409ee5fe085fb4e7fb (diff) |
tests/tcg: mips: Test R5900 three-operand MADDU
Test R5900 three-operand MADDU.
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Fredrik Noring <noring@nocrew.org>
Diffstat (limited to 'tests')
-rw-r--r-- | tests/tcg/mips/mipsr5900/Makefile | 1 | ||||
-rw-r--r-- | tests/tcg/mips/mipsr5900/maddu.c | 37 |
2 files changed, 38 insertions, 0 deletions
diff --git a/tests/tcg/mips/mipsr5900/Makefile b/tests/tcg/mips/mipsr5900/Makefile index 97ca2a671c..27ee5d5f54 100644 --- a/tests/tcg/mips/mipsr5900/Makefile +++ b/tests/tcg/mips/mipsr5900/Makefile @@ -11,6 +11,7 @@ CFLAGS = -Wall -mabi=32 -march=r5900 -static TESTCASES = div1.tst TESTCASES += divu1.tst TESTCASES += madd.tst +TESTCASES += maddu.tst TESTCASES += mflohi1.tst TESTCASES += mtlohi1.tst TESTCASES += mult.tst diff --git a/tests/tcg/mips/mipsr5900/maddu.c b/tests/tcg/mips/mipsr5900/maddu.c new file mode 100644 index 0000000000..e4e552102d --- /dev/null +++ b/tests/tcg/mips/mipsr5900/maddu.c @@ -0,0 +1,37 @@ +/* + * Test R5900-specific three-operand MADDU. + */ + +#include <stdio.h> +#include <inttypes.h> +#include <assert.h> + +uint64_t maddu(uint64_t a, uint32_t rs, uint32_t rt) +{ + uint32_t lo = a; + uint32_t hi = a >> 32; + uint32_t rd; + uint64_t r; + + __asm__ __volatile__ ( + " mtlo %5\n" + " mthi %6\n" + " maddu %0, %3, %4\n" + " mflo %1\n" + " mfhi %2\n" + : "=r" (rd), "=r" (lo), "=r" (hi) + : "r" (rs), "r" (rt), "r" (lo), "r" (hi)); + r = ((uint64_t)hi << 32) | (uint32_t)lo; + + assert(a + (uint64_t)rs * rt == r); + assert(rd == lo); + + return r; +} + +int main() +{ + assert(maddu(13, 17, 19) == 336); + + return 0; +} |