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| author | Peter Maydell <peter.maydell@linaro.org> | 2019-05-21 10:44:21 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2019-05-21 10:44:21 +0100 |
| commit | 293c76cb48332d2bbd70bd975dc60ee3650b3170 (patch) | |
| tree | dd0c752de59da7520cec044c2fcc8bfba869da30 /tests | |
| parent | 2259637b95bef3116cc262459271de08e038cc66 (diff) | |
| parent | b345e140534ea17814b02bdf8798f18db6295304 (diff) | |
Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into staging
target/xtensa: SR reorganization and options for modern cores
Reorganize special register handling to support configurations with
conflicting SR definitions.
Implement options used by the modern xtensa cores:
- memory protection unit;
- block prefetch;
- exclusive access
Add special register definitions and IRQ types for ECC/parity,
gather/scatter and IDMA.
# gpg: Signature made Mon 20 May 2019 18:53:05 BST
# gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg: issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044
* remotes/xtensa/tags/20190520-xtensa:
target/xtensa: implement exclusive access option
target/xtensa: update list of exception causes
target/xtensa: implement block prefetch option opcodes
target/xtensa: implement DIWBUI.P opcode
target/xtensa: implement MPU option
target/xtensa: add parity/ECC option SRs
target/xtensa: define IDMA and gather/scatter IRQ types
target/xtensa: make internal MMU functions static
target/xtensa: get rid of centralized SR properties
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/tcg/xtensa/test_exclusive.S | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/tests/tcg/xtensa/test_exclusive.S b/tests/tcg/xtensa/test_exclusive.S new file mode 100644 index 0000000000..7757a552ea --- /dev/null +++ b/tests/tcg/xtensa/test_exclusive.S @@ -0,0 +1,48 @@ +#include "macros.inc" + +test_suite exclusive + +#if XCHAL_HAVE_EXCLUSIVE + +test exclusive_nowrite + movi a2, 0x29 + wsr a2, atomctl + clrex + movi a2, 1f + movi a3, 1 + s32ex a3, a2 + getex a3 + assert eqi, a3, 0 + l32i a3, a2, 0 + assert eqi, a3, 3 + +.data +.align 4 +1: + .word 3 +.text +test_end + +test exclusive_write + movi a2, 0x29 + wsr a2, atomctl + movi a2, 1f + l32ex a3, a2 + assert eqi, a3, 3 + movi a3, 2 + s32ex a3, a2 + getex a3 + assert eqi, a3, 1 + l32i a3, a2, 0 + assert eqi, a3, 2 + +.data +.align 4 +1: + .word 3 +.text +test_end + +#endif + +test_suite_end |