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authorPeter Maydell <peter.maydell@linaro.org>2018-03-27 15:23:38 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-03-27 15:23:38 +0100
commit62d0289662746585239fbbf6a8d548f37f5fe6a8 (patch)
treef04556d51a3aabaa3859faea3c27344064121c12 /tests
parentbdc408e91b14cedfc29be8ff703408936e575721 (diff)
parentd0ce7e9cfc8eda113f872b608fe4a3dd7662997e (diff)
Merge remote-tracking branch 'remotes/xtensa/tags/20180326-xtensa' into staging
target/xtensa fixes for 2.12: - add .inc. to non-top level source file names under target/xtensa; - fix #include <xtensa-isa.h> in the import_core.sh script; - remove stray linux-user/xtensa/syscall.h; - fix timers test. # gpg: Signature made Mon 26 Mar 2018 22:40:20 BST # gpg: using RSA key 51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <filippov@cadence.com>" # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20180326-xtensa: target/xtensa: fix timers test linux-user/xtensa: remove stray syscall.h target/xtensa/import_core.sh: fix #include <xtensa-isa.h> target/xtensa: add .inc. to non-top level source file names Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests')
-rw-r--r--tests/tcg/xtensa/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile
index 2882c431e4..091518c055 100644
--- a/tests/tcg/xtensa/Makefile
+++ b/tests/tcg/xtensa/Makefile
@@ -5,7 +5,7 @@ CROSS=xtensa-$(CORE)-elf-
ifndef XT
SIM = ../../../xtensa-softmmu/qemu-system-xtensa
-SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 7 $(EXTFLAGS) -kernel
+SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 6 $(EXTFLAGS) -kernel
SIMDEBUG = -s -S
else
SIM = xt-run