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authorMarkus Armbruster <armbru@redhat.com>2016-03-15 19:34:21 +0100
committerMarkus Armbruster <armbru@redhat.com>2016-03-21 21:28:59 +0100
commit998261726a6aff3c8a88ae6965e51a6717b467ff (patch)
tree8df445c933b91c33fc048a9eb97d597a5515d1ed /tests
parent330b58368ca16c31efdadcf8263f7f903546af50 (diff)
tests/libqos/pci-pc: Fix qpci_pc_iomap() to map BARs aligned
qpci_pc_iomap() maps BARs one after the other, without padding. This is wrong. PCI Local Bus Specification Revision 3.0, 6.2.5.1. Address Maps: "all address spaces used are a power of two in size and are naturally aligned". That's because the size of a BAR is given by the number of address bits the device decodes, and the BAR needs to be mapped at a multiple of that size to ensure the address decoding works. Fix qpci_pc_iomap() accordingly. This takes care of a FIXME in ivshmem-test. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <1458066895-20632-7-git-send-email-armbru@redhat.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/ivshmem-test.c13
-rw-r--r--tests/libqos/pci-pc.c8
2 files changed, 12 insertions, 9 deletions
diff --git a/tests/ivshmem-test.c b/tests/ivshmem-test.c
index 4efa433f6e..da6ca0dd9e 100644
--- a/tests/ivshmem-test.c
+++ b/tests/ivshmem-test.c
@@ -110,18 +110,17 @@ static void setup_vm_cmd(IVState *s, const char *cmd, bool msix)
s->pcibus = qpci_init_pc();
s->dev = get_device(s->pcibus);
- /* FIXME: other bar order fails, mappings changes */
- s->mem_base = qpci_iomap(s->dev, 2, &barsize);
- g_assert_nonnull(s->mem_base);
- g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
+ s->reg_base = qpci_iomap(s->dev, 0, &barsize);
+ g_assert_nonnull(s->reg_base);
+ g_assert_cmpuint(barsize, ==, 256);
if (msix) {
qpci_msix_enable(s->dev);
}
- s->reg_base = qpci_iomap(s->dev, 0, &barsize);
- g_assert_nonnull(s->reg_base);
- g_assert_cmpuint(barsize, ==, 256);
+ s->mem_base = qpci_iomap(s->dev, 2, &barsize);
+ g_assert_nonnull(s->mem_base);
+ g_assert_cmpuint(barsize, ==, TMPSHMSIZE);
qpci_device_enable(s->dev);
}
diff --git a/tests/libqos/pci-pc.c b/tests/libqos/pci-pc.c
index 08167c09fe..77f15e5a0e 100644
--- a/tests/libqos/pci-pc.c
+++ b/tests/libqos/pci-pc.c
@@ -184,7 +184,9 @@ static void *qpci_pc_iomap(QPCIBus *bus, QPCIDevice *dev, int barno, uint64_t *s
if (io_type == PCI_BASE_ADDRESS_SPACE_IO) {
uint16_t loc;
- g_assert((s->pci_iohole_alloc + size) <= s->pci_iohole_size);
+ g_assert(QEMU_ALIGN_UP(s->pci_iohole_alloc, size) + size
+ <= s->pci_iohole_size);
+ s->pci_iohole_alloc = QEMU_ALIGN_UP(s->pci_iohole_alloc, size);
loc = s->pci_iohole_start + s->pci_iohole_alloc;
s->pci_iohole_alloc += size;
@@ -194,7 +196,9 @@ static void *qpci_pc_iomap(QPCIBus *bus, QPCIDevice *dev, int barno, uint64_t *s
} else {
uint64_t loc;
- g_assert((s->pci_hole_alloc + size) <= s->pci_hole_size);
+ g_assert(QEMU_ALIGN_UP(s->pci_hole_alloc, size) + size
+ <= s->pci_hole_size);
+ s->pci_hole_alloc = QEMU_ALIGN_UP(s->pci_hole_alloc, size);
loc = s->pci_hole_start + s->pci_hole_alloc;
s->pci_hole_alloc += size;