diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2011-10-10 06:25:04 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-10-15 21:03:03 +0000 |
| commit | 890c6333b28a4dcbf2a26a5a17b0e71304d5a851 (patch) | |
| tree | d9243ab3e1a3eab793184eb49134b9c1d9c6fa87 /tests | |
| parent | 9870a5e6cd3df584328728b3d822b23cee28c561 (diff) | |
target-xtensa: fix guest hang on masked CCOMPARE interrupt
QEMU timer is used to post CCOMPARE interrupt when the core is halted.
If that CCOMPARE interrupt is masked off then the timer must be rearmed
in the callback, otherwise it will be rearmed next time the core goes to
halt by the waiti instruction.
Add test case into timer testsuite.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/xtensa/test_timer.S | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/tests/xtensa/test_timer.S b/tests/xtensa/test_timer.S index ede63955cc..1041cc6658 100644 --- a/tests/xtensa/test_timer.S +++ b/tests/xtensa/test_timer.S @@ -14,6 +14,7 @@ test ccompare wsr a2, intenable rsr a2, interrupt wsr a2, intclear + movi a2, 0 wsr a2, ccompare1 wsr a2, ccompare2 @@ -37,6 +38,7 @@ test ccompare0_interrupt wsr a2, intenable rsr a2, interrupt wsr a2, intclear + movi a2, 0 wsr a2, ccompare1 wsr a2, ccompare2 @@ -66,6 +68,7 @@ test ccompare1_interrupt wsr a2, intenable rsr a2, interrupt wsr a2, intclear + movi a2, 0 wsr a2, ccompare0 wsr a2, ccompare2 @@ -92,6 +95,7 @@ test ccompare2_interrupt wsr a2, intenable rsr a2, interrupt wsr a2, intclear + movi a2, 0 wsr a2, ccompare0 wsr a2, ccompare1 @@ -112,4 +116,63 @@ test ccompare2_interrupt 2: test_end +test ccompare_interrupt_masked + set_vector kernel, 2f + movi a2, 0 + wsr a2, intenable + rsr a2, interrupt + wsr a2, intclear + movi a2, 0 + wsr a2, ccompare2 + + movi a3, 40 + rsr a2, ccount + addi a2, a2, 20 + wsr a2, ccompare1 + addi a2, a2, 20 + wsr a2, ccompare0 + rsync + rsr a2, interrupt + assert eqi, a2, 0 + + movi a2, 0x40 + wsr a2, intenable + rsil a2, 0 + loop a3, 1f + nop +1: + test_fail +2: + rsr a2, exccause + assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */ +test_end + +test ccompare_interrupt_masked_waiti + set_vector kernel, 2f + movi a2, 0 + wsr a2, intenable + rsr a2, interrupt + wsr a2, intclear + movi a2, 0 + wsr a2, ccompare2 + + movi a3, 40 + rsr a2, ccount + addi a2, a2, 20 + wsr a2, ccompare1 + addi a2, a2, 20 + wsr a2, ccompare0 + rsync + rsr a2, interrupt + assert eqi, a2, 0 + + movi a2, 0x40 + wsr a2, intenable + waiti 0 + test_fail +2: + rsr a2, exccause + assert eqi, a2, 4 /* LEVEL1_INTERRUPT_CAUSE */ +test_end + test_suite_end |