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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-04-30 11:34:59 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-04-30 11:35:00 +0100 |
| commit | c3811c08ac0c80e9d823317dde07b4c12de67069 (patch) | |
| tree | a7de5a0f4073ca01343b5b415fecab94ee7559d5 /tests/unit/test-bdrv-drain.c | |
| parent | ccdf06c1db192152ac70a1dd974c624f566cb7d4 (diff) | |
| parent | a6091108aa44e9017af4ca13c43f55a629e3744c (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210430' into staging
target-arm queue:
* hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows
* hw: add compat machines for 6.1
* Fault misaligned accesses where the architecture requires it
* Fix some corner cases of MTE faults (notably with misaligned accesses)
* Make Thumb store insns UNDEF for Rn==1111
* hw/arm/smmuv3: Support 16K translation granule
# gpg: Signature made Fri 30 Apr 2021 11:33:45 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210430: (43 commits)
hw/pci-host/gpex: Don't fault for unmapped parts of MMIO and PIO windows
hw: add compat machines for 6.1
target/arm: Enforce alignment for sve LD1R
target/arm: Enforce alignment for aa64 vector LDn/STn (single)
target/arm: Enforce alignment for aa64 vector LDn/STn (multiple)
target/arm: Use MemOp for size + endian in aa64 vector ld/st
target/arm: Enforce alignment for aa64 load-acq/store-rel
target/arm: Use finalize_memop for aa64 fpr load/store
target/arm: Use finalize_memop for aa64 gpr load/store
target/arm: Enforce alignment for VLDn/VSTn (single)
target/arm: Enforce alignment for VLDn/VSTn (multiple)
target/arm: Enforce alignment for VLDn (all lanes)
target/arm: Enforce alignment for VLDR/VSTR
target/arm: Enforce alignment for VLDM/VSTM
target/arm: Enforce alignment for SRS
target/arm: Enforce alignment for RFE
target/arm: Enforce alignment for LDM/STM
target/arm: Enforce alignment for LDA/LDAH/STL/STLH
target/arm: Enforce word alignment for LDRD/STRD
target/arm: Adjust gen_aa32_{ld, st}_i64 for align+endianness
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/unit/test-bdrv-drain.c')
0 files changed, 0 insertions, 0 deletions