diff options
| author | Bastian Koppelmann <kbastian@mail.uni-paderborn.de> | 2021-05-12 11:20:34 +0100 |
|---|---|---|
| committer | Alex Bennée <alex.bennee@linaro.org> | 2021-05-18 09:36:21 +0100 |
| commit | be78e79949e64b4c88ebc4635d6a6fb05356d952 (patch) | |
| tree | 0b19804d27afcad228588532258e814ead6b2f77 /tests/tcg | |
| parent | 582079c9d27fc8cfff9f495072300416e0e4aafe (diff) | |
tests/tcg/tricore: Add build infrastructure
this includes the Makefile and linker script to build all the tests.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210305170045.869437-5-kbastian@mail.uni-paderborn.de>
Message-Id: <20210512102051.12134-15-alex.bennee@linaro.org>
Diffstat (limited to 'tests/tcg')
| -rw-r--r-- | tests/tcg/tricore/Makefile.softmmu-target | 15 | ||||
| -rw-r--r-- | tests/tcg/tricore/link.ld | 60 |
2 files changed, 75 insertions, 0 deletions
diff --git a/tests/tcg/tricore/Makefile.softmmu-target b/tests/tcg/tricore/Makefile.softmmu-target new file mode 100644 index 0000000000..d64a99b95f --- /dev/null +++ b/tests/tcg/tricore/Makefile.softmmu-target @@ -0,0 +1,15 @@ +TESTS_PATH = $(SRC_PATH)/tests/tcg/tricore + +LDFLAGS = -T$(TESTS_PATH)/link.ld +ASFLAGS = + +QEMU_OPTS += -M tricore_testboard -nographic -kernel + +%.pS: $(TESTS_PATH)/%.S + $(HOST_CC) -E -o $@ $< + +%.o: %.pS + $(AS) $(ASFLAGS) -o $@ $< + +%.tst: %.o + $(LD) $(LDFLAGS) $< -o $@ diff --git a/tests/tcg/tricore/link.ld b/tests/tcg/tricore/link.ld new file mode 100644 index 0000000000..364bcdc00a --- /dev/null +++ b/tests/tcg/tricore/link.ld @@ -0,0 +1,60 @@ +/* Default linker script, for normal executables */ +OUTPUT_FORMAT("elf32-tricore") +OUTPUT_ARCH(tricore) +ENTRY(_start) + +/* the internal ram description */ +MEMORY +{ + text_ram (rx!p): org = 0x80000000, len = 15K + data_ram (w!xp): org = 0xd0000000, len = 130K +} +/* + * Define the sizes of the user and system stacks. + */ +__USTACK_SIZE = DEFINED (__USTACK_SIZE) ? __USTACK_SIZE : 1K ; +/* + * Define the start address and the size of the context save area. + */ +__CSA_BEGIN = 0xd0000000 ; +__CSA_SIZE = 8k ; +__CSA_END = __CSA_BEGIN + __CSA_SIZE ; + +SECTIONS +{ + .text : + { + *(.text) + . = ALIGN(8); + } > text_ram + + .rodata : + { + *(.rodata) + *(.rodata1) + } > data_ram + + .data : + { + . = ALIGN(8) ; + *(.data) + *(.data.*) + . = ALIGN(8) ; + __USTACK = . + __USTACK_SIZE -768; + + } > data_ram + /* + * Allocate space for BSS sections. + */ + .bss : + { + BSS_BASE = . ; + *(.bss) + *(COMMON) + . = ALIGN(8) ; + } > data_ram + /* Make sure CSA, stack and heap addresses are properly aligned. */ + _. = ASSERT ((__CSA_BEGIN & 0x3f) == 0 , "illegal CSA start address") ; + _. = ASSERT ((__CSA_SIZE & 0x3f) == 0 , "illegal CSA size") ; + +} |