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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2021-05-12 11:20:36 +0100
committerAlex Bennée <alex.bennee@linaro.org>2021-05-18 09:36:21 +0100
commit2d934b5951880ba68948e2c42060d53ceb578e06 (patch)
treef32169057d8eac92f897253fe81c53251c231d6c /tests/tcg/tricore
parent433de74ced65cb6bffec3493876584d1ce73fd3b (diff)
tests/tcg/tricore: Add macros to create tests and first test 'abs'
This kind of tests is inspired by the riscv-tests repository. This adds macros that makes it easy to create single instruction self containing tests. It is achieved by macros that create a test sequence for an instruction and check for a supplied correct value. If the value is correct the next instruction is tested. Otherwise we jump to fail handler that writes is test number as a status code back to qemu that then exits on that status code. If all tests pass we write back 0 as a status code and exit. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20210305170045.869437-7-kbastian@mail.uni-paderborn.de> [AJB: add container_hosts] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210512102051.12134-17-alex.bennee@linaro.org>
Diffstat (limited to 'tests/tcg/tricore')
-rw-r--r--tests/tcg/tricore/Makefile.softmmu-target2
-rw-r--r--tests/tcg/tricore/macros.h53
-rw-r--r--tests/tcg/tricore/test_abs.S7
3 files changed, 62 insertions, 0 deletions
diff --git a/tests/tcg/tricore/Makefile.softmmu-target b/tests/tcg/tricore/Makefile.softmmu-target
index d64a99b95f..3b048e49fa 100644
--- a/tests/tcg/tricore/Makefile.softmmu-target
+++ b/tests/tcg/tricore/Makefile.softmmu-target
@@ -3,6 +3,8 @@ TESTS_PATH = $(SRC_PATH)/tests/tcg/tricore
LDFLAGS = -T$(TESTS_PATH)/link.ld
ASFLAGS =
+TESTS += test_abs.tst
+
QEMU_OPTS += -M tricore_testboard -nographic -kernel
%.pS: $(TESTS_PATH)/%.S
diff --git a/tests/tcg/tricore/macros.h b/tests/tcg/tricore/macros.h
new file mode 100644
index 0000000000..76c133132a
--- /dev/null
+++ b/tests/tcg/tricore/macros.h
@@ -0,0 +1,53 @@
+/* Helpers */
+#define LI(reg, val) \
+ mov.u reg, lo:val; \
+ movh DREG_TEMP_LI, up:val; \
+ or reg, reg, DREG_TEMP_LI; \
+
+/* Address definitions */
+#define TESTDEV_ADDR 0xf0000000
+/* Register definitions */
+#define DREG_RS1 %d0
+#define DREG_CALC_RESULT %d1
+#define DREG_TEMP_LI %d10
+#define DREG_TEMP %d11
+#define DREG_TEST_NUM %d14
+#define DREG_CORRECT_RESULT %d15
+
+#define DREG_DEV_ADDR %a15
+
+/* Test case wrappers */
+#define TEST_CASE(num, testreg, correct, code...) \
+test_ ## num: \
+ code; \
+ LI(DREG_CORRECT_RESULT, correct) \
+ mov DREG_TEST_NUM, num; \
+ jne testreg, DREG_CORRECT_RESULT, fail \
+
+/* Actual test case type
+ * e.g inst %dX, %dY -> TEST_D_D
+ * inst %dX, %dY, %dZ -> TEST_D_DD
+ * inst %eX, %dY, %dZ -> TEST_E_DD
+ */
+#define TEST_D_D(insn, num, result, rs1) \
+ TEST_CASE(num, DREG_CALC_RESULT, result, \
+ LI(DREG_RS1, rs1); \
+ insn DREG_CALC_RESULT, DREG_RS1; \
+ )
+
+/* Pass/Fail handling part */
+#define TEST_PASSFAIL \
+ j pass; \
+fail: \
+ LI(DREG_TEMP, TESTDEV_ADDR) \
+ mov.a DREG_DEV_ADDR, DREG_TEMP; \
+ st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
+ debug; \
+ j fail; \
+pass: \
+ LI(DREG_TEMP, TESTDEV_ADDR) \
+ mov.a DREG_DEV_ADDR, DREG_TEMP; \
+ mov DREG_TEST_NUM, 0; \
+ st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
+ debug; \
+ j pass;
diff --git a/tests/tcg/tricore/test_abs.S b/tests/tcg/tricore/test_abs.S
new file mode 100644
index 0000000000..e42240159a
--- /dev/null
+++ b/tests/tcg/tricore/test_abs.S
@@ -0,0 +1,7 @@
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_D(abs, 1, 0, 0)
+
+ TEST_PASSFAIL