diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2019-01-25 16:31:02 +0000 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2019-01-25 16:31:02 +0000 |
commit | 2dc2f10de3e20854f8b7cbada9622d699a41f106 (patch) | |
tree | 3fcfeffc70449d59fbae27987d7caee6898250b2 /tests/tcg/mips/mips64-dspr2/head.S | |
parent | 9dd0d8111fbb8015db75a38933aee1d45f9e64a3 (diff) | |
parent | e5a5b1bb7cfa2da3762f947003cba6a16fa242a1 (diff) |
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-january-25-2019' into staging
MIPS queue for January 25, 2019
# gpg: Signature made Fri 25 Jan 2019 13:25:57 GMT
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-january-25-2019:
docs/qemu-cpu-models: Add MIPS/nanoMIPS QEMU supported CPU models
qemu-doc: Add nanoMIPS ISA information
tests: tcg: mips: Remove old directories
tests: tcg: mips: Add two new Makefiles
tests: tcg: mips: Move source files to new locations
MAINTAINERS: Update MIPS sections
target/mips: Add I6500 core configuration
target/mips: nanoMIPS: Fix branch handling
disas: nanoMIPS: Amend DSP instructions related comments
target/mips: Extend gen_scwp() functionality to support EVA
target/mips: Correct the second argument type of cpu_supports_isa()
target/mips: nanoMIPS: Rename macros for extracting 3-bit-coded GPR numbers
target/mips: nanoMIPS: Remove an unused macro
target/mips: nanoMIPS: Remove duplicate macro definitions
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tests/tcg/mips/mips64-dspr2/head.S')
-rw-r--r-- | tests/tcg/mips/mips64-dspr2/head.S | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/tests/tcg/mips/mips64-dspr2/head.S b/tests/tcg/mips/mips64-dspr2/head.S deleted file mode 100644 index 9a099ae42f..0000000000 --- a/tests/tcg/mips/mips64-dspr2/head.S +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Startup Code for MIPS64 CPU-core - * - */ -.text -.globl _start -.align 4 -_start: - ori $2, $2, 0xffff - sll $2, $2, 16 - ori $2, $2, 0xffff - mtc0 $2, $12, 0 - jal main - -end: - b end |