diff options
| author | Anthony Liguori <aliguori@us.ibm.com> | 2012-01-10 13:10:42 -0600 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-01-12 10:03:28 -0600 |
| commit | c09015dd04e14a9b99250ed06fb5a47e2efa387f (patch) | |
| tree | cc9e2078c44558a7d0e4ee9bd914383c6be130b5 /tests/tcg/cris/check_clrjmp1.s | |
| parent | a0f426109e17d579c2712f5b96a50215e6cc06a4 (diff) | |
tests: mv tests/* -> tests/tcg
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'tests/tcg/cris/check_clrjmp1.s')
| -rw-r--r-- | tests/tcg/cris/check_clrjmp1.s | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/tests/tcg/cris/check_clrjmp1.s b/tests/tcg/cris/check_clrjmp1.s new file mode 100644 index 0000000000..45a7005e24 --- /dev/null +++ b/tests/tcg/cris/check_clrjmp1.s @@ -0,0 +1,36 @@ +# mach: crisv3 crisv8 crisv10 crisv32 +# output: ffffff00\n + +; A bug resulting in a non-effectual clear.b discovered running the GCC +; testsuite; jump actually wrote to p0. + + .include "testutils.inc" + + start + jump 1f + nop + .p2align 8 +1: + move.d y,r4 + + .if 0 ;0 == ..asm.arch.cris.v32 +; There was a bug causing this insn to set special register p0 +; (byte-clear) to 8 (low 8 bits of location after insn). + jump [r4+] + .endif + +1: + move.d 0f,r4 + +; The corresponding bug would cause this insn too, to set p0. + jump r4 + nop + quit +0: + moveq -1,r3 + clear.b r3 + checkr3 ffffff00 + quit + +y: + .dword 1b |