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authorAlex Bennée <alex.bennee@linaro.org>2018-04-05 15:45:32 +0100
committerAlex Bennée <alex.bennee@linaro.org>2018-06-20 20:22:34 +0100
commitc348722c53a098d6a409ddc94b7ca20299815234 (patch)
treefd2ccb7340df032a3e00c8c4f275766b5c88c033 /tests/tcg/arm
parente571ba67cbc6b641f0ee0a21e0e2b9432e9eb3eb (diff)
tests/tcg: move ARM specific tests into subdir
These only need to be built for ARM guests. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tests/tcg/arm')
-rw-r--r--tests/tcg/arm/Makefile.target13
-rw-r--r--tests/tcg/arm/README11
-rw-r--r--tests/tcg/arm/hello-arm.c113
-rw-r--r--tests/tcg/arm/test-arm-iwmmxt.s49
4 files changed, 186 insertions, 0 deletions
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
new file mode 100644
index 0000000000..bc6962ecc6
--- /dev/null
+++ b/tests/tcg/arm/Makefile.target
@@ -0,0 +1,13 @@
+# -*- Mode: makefile -*-
+#
+# ARM - included from tests/tcg/Makefile.target
+#
+
+ARM_SRC=$(SRC_PATH)/tests/tcg/arm
+
+# Set search path for all sources
+VPATH += $(ARM_SRC)
+
+
+hello-arm: CFLAGS+=-marm -ffreestanding
+hello-arm: LDFLAGS+=-nostdlib
diff --git a/tests/tcg/arm/README b/tests/tcg/arm/README
new file mode 100644
index 0000000000..e6307116e2
--- /dev/null
+++ b/tests/tcg/arm/README
@@ -0,0 +1,11 @@
+These are ARM specific guest programs
+
+hello-arm
+---------
+
+A very simple inline assembly, write syscall based hello world
+
+test-arm-iwmmxt
+---------------
+
+A simple test case for older iwmmxt extended ARMs
diff --git a/tests/tcg/arm/hello-arm.c b/tests/tcg/arm/hello-arm.c
new file mode 100644
index 0000000000..e0daa7ad98
--- /dev/null
+++ b/tests/tcg/arm/hello-arm.c
@@ -0,0 +1,113 @@
+#define __NR_SYSCALL_BASE 0x900000
+#define __NR_exit1 (__NR_SYSCALL_BASE+ 1)
+#define __NR_write (__NR_SYSCALL_BASE+ 4)
+
+#define __sys2(x) #x
+#define __sys1(x) __sys2(x)
+
+#ifndef __syscall
+#define __syscall(name) "swi\t" __sys1(__NR_##name) "\n\t"
+#endif
+
+#define __syscall_return(type, res) \
+do { \
+ return (type) (res); \
+} while (0)
+
+#define _syscall0(type,name) \
+type name(void) { \
+ long __res; \
+ __asm__ __volatile__ ( \
+ __syscall(name) \
+ "mov %0,r0" \
+ :"=r" (__res) : : "r0","lr"); \
+ __syscall_return(type,__res); \
+}
+
+#define _syscall1(type,name,type1,arg1) \
+type name(type1 arg1) { \
+ long __res; \
+ __asm__ __volatile__ ( \
+ "mov\tr0,%1\n\t" \
+ __syscall(name) \
+ "mov %0,r0" \
+ : "=r" (__res) \
+ : "r" ((long)(arg1)) \
+ : "r0","lr"); \
+ __syscall_return(type,__res); \
+}
+
+#define _syscall2(type,name,type1,arg1,type2,arg2) \
+type name(type1 arg1,type2 arg2) { \
+ long __res; \
+ __asm__ __volatile__ ( \
+ "mov\tr0,%1\n\t" \
+ "mov\tr1,%2\n\t" \
+ __syscall(name) \
+ "mov\t%0,r0" \
+ : "=r" (__res) \
+ : "r" ((long)(arg1)),"r" ((long)(arg2)) \
+ : "r0","r1","lr"); \
+ __syscall_return(type,__res); \
+}
+
+
+#define _syscall3(type,name,type1,arg1,type2,arg2,type3,arg3) \
+type name(type1 arg1,type2 arg2,type3 arg3) { \
+ long __res; \
+ __asm__ __volatile__ ( \
+ "mov\tr0,%1\n\t" \
+ "mov\tr1,%2\n\t" \
+ "mov\tr2,%3\n\t" \
+ __syscall(name) \
+ "mov\t%0,r0" \
+ : "=r" (__res) \
+ : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)) \
+ : "r0","r1","r2","lr"); \
+ __syscall_return(type,__res); \
+}
+
+
+#define _syscall4(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4) \
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
+ long __res; \
+ __asm__ __volatile__ ( \
+ "mov\tr0,%1\n\t" \
+ "mov\tr1,%2\n\t" \
+ "mov\tr2,%3\n\t" \
+ "mov\tr3,%4\n\t" \
+ __syscall(name) \
+ "mov\t%0,r0" \
+ : "=r" (__res) \
+ : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)) \
+ : "r0","r1","r2","r3","lr"); \
+ __syscall_return(type,__res); \
+}
+
+
+#define _syscall5(type,name,type1,arg1,type2,arg2,type3,arg3,type4,arg4,type5,arg5) \
+type name(type1 arg1, type2 arg2, type3 arg3, type4 arg4, type5 arg5) { \
+ long __res; \
+ __asm__ __volatile__ ( \
+ "mov\tr0,%1\n\t" \
+ "mov\tr1,%2\n\t" \
+ "mov\tr2,%3\n\t" \
+ "mov\tr3,%4\n\t" \
+ "mov\tr4,%5\n\t" \
+ __syscall(name) \
+ "mov\t%0,r0" \
+ : "=r" (__res) \
+ : "r" ((long)(arg1)),"r" ((long)(arg2)),"r" ((long)(arg3)),"r" ((long)(arg4)), \
+ "r" ((long)(arg5)) \
+ : "r0","r1","r2","r3","r4","lr"); \
+ __syscall_return(type,__res); \
+}
+
+_syscall1(int,exit1,int,status);
+_syscall3(int,write,int,fd,const char *,buf, int, len);
+
+void _start(void)
+{
+ write(1, "Hello World\n", 12);
+ exit1(0);
+}
diff --git a/tests/tcg/arm/test-arm-iwmmxt.s b/tests/tcg/arm/test-arm-iwmmxt.s
new file mode 100644
index 0000000000..d647f9404a
--- /dev/null
+++ b/tests/tcg/arm/test-arm-iwmmxt.s
@@ -0,0 +1,49 @@
+@ Checks whether iwMMXt is functional.
+.code 32
+.globl main
+
+main:
+ldr r0, =data0
+ldr r1, =data1
+ldr r2, =data2
+#ifndef FPA
+wldrd wr0, [r0, #0]
+wldrd wr1, [r0, #8]
+wldrd wr2, [r1, #0]
+wldrd wr3, [r1, #8]
+wsubb wr2, wr2, wr0
+wsubb wr3, wr3, wr1
+wldrd wr0, [r2, #0]
+wldrd wr1, [r2, #8]
+waddb wr0, wr0, wr2
+waddb wr1, wr1, wr3
+wstrd wr0, [r2, #0]
+wstrd wr1, [r2, #8]
+#else
+ldfe f0, [r0, #0]
+ldfe f1, [r0, #8]
+ldfe f2, [r1, #0]
+ldfe f3, [r1, #8]
+adfdp f2, f2, f0
+adfdp f3, f3, f1
+ldfe f0, [r2, #0]
+ldfe f1, [r2, #8]
+adfd f0, f0, f2
+adfd f1, f1, f3
+stfe f0, [r2, #0]
+stfe f1, [r2, #8]
+#endif
+mov r0, #1
+mov r1, r2
+mov r2, #0x11
+swi #0x900004
+mov r0, #0
+swi #0x900001
+
+.data
+data0:
+.string "aaaabbbbccccdddd"
+data1:
+.string "bbbbccccddddeeee"
+data2:
+.string "hvLLWs\x1fsdrs9\x1fNJ-\n"