diff options
| author | Ani Sinha <ani@anisinha.ca> | 2020-09-18 14:11:09 +0530 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2020-09-29 03:06:12 -0400 |
| commit | 0ed93f4c05896145434adbce5fa328643260dd2e (patch) | |
| tree | 75a68f6a178d8a72d62a20b323fbb2a4efbdd83e /tests/data/acpi/pc | |
| parent | df4008c9c597634833bc0ae38e09ce49a51747d5 (diff) | |
tests/acpi: update golden master DSDT binary table blobs for q35
In the previously applied commit ("piix4: don't reserve hw resources when
hotplug is off globally"), we make changes to the ACPI DSDT tables
such that some ACPI code are not generated when bsel is absent. Since
as of this point in time, in q35 machines, we do not use bsel for pci
buses, we need to update the DSDT table blobs.
This patch updates the DSDT golden master tables for q35 machines.
At the same time, we clear bios-tables-test-allowed-diff.h for future
changes which update tables.
Following is a typical diff between the q35 acpi DSDT table blobs:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180105 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/q35/DSDT, Tue Sep 15 18:52:47 2020
+ * Disassembly of /tmp/aml-3O0DR0, Tue Sep 15 18:52:47 2020
*
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001DFE (7678)
+ * Length 0x00001DF6 (7670)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
- * Checksum 0xAC
+ * Checksum 0x17
* OEM ID "BOCHS "
* OEM Table ID "BXPCDSDT"
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001)
{
Scope (\)
{
OperationRegion (DBG, SystemIO, 0x0402, One)
Field (DBG, ByteAcc, NoLock, Preserve)
{
DBGB, 8
}
@@ -3113,24 +3113,20 @@
Name (_ADR, 0x00010000) // _ADR: Address
Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State
{
Return (Zero)
}
Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State
{
Return (Zero)
}
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
{
Return (Zero)
}
}
-
- Method (PCNT, 0, NotSerialized)
- {
- }
}
}
}
Signed-off-by: Ani Sinha <ani@anisinha.ca>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20200918084111.15339-12-ani@anisinha.ca>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'tests/data/acpi/pc')
106 files changed, 16473 insertions, 0 deletions
diff --git a/tests/data/acpi/pc/APIC.acpihmat.dsl b/tests/data/acpi/pc/APIC.acpihmat.dsl new file mode 100644 index 0000000000..15155cac55 --- /dev/null +++ b/tests/data/acpi/pc/APIC.acpihmat.dsl @@ -0,0 +1,112 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000080 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : DA +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 01 [I/O APIC] +[03Dh 0061 1] Length : 0C +[03Eh 0062 1] I/O Apic ID : 00 +[03Fh 0063 1] Reserved : 00 +[040h 0064 4] Address : FEC00000 +[044h 0068 4] Interrupt : 00000000 + +[048h 0072 1] Subtable Type : 02 [Interrupt Source Override] +[049h 0073 1] Length : 0A +[04Ah 0074 1] Bus : 00 +[04Bh 0075 1] Source : 00 +[04Ch 0076 4] Interrupt : 00000002 +[050h 0080 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[052h 0082 1] Subtable Type : 02 [Interrupt Source Override] +[053h 0083 1] Length : 0A +[054h 0084 1] Bus : 00 +[055h 0085 1] Source : 05 +[056h 0086 4] Interrupt : 00000005 +[05Ah 0090 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Ch 0092 1] Subtable Type : 02 [Interrupt Source Override] +[05Dh 0093 1] Length : 0A +[05Eh 0094 1] Bus : 00 +[05Fh 0095 1] Source : 09 +[060h 0096 4] Interrupt : 00000009 +[064h 0100 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[066h 0102 1] Subtable Type : 02 [Interrupt Source Override] +[067h 0103 1] Length : 0A +[068h 0104 1] Bus : 00 +[069h 0105 1] Source : 0A +[06Ah 0106 4] Interrupt : 0000000A +[06Eh 0110 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[070h 0112 1] Subtable Type : 02 [Interrupt Source Override] +[071h 0113 1] Length : 0A +[072h 0114 1] Bus : 00 +[073h 0115 1] Source : 0B +[074h 0116 4] Interrupt : 0000000B +[078h 0120 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[07Ah 0122 1] Subtable Type : 04 [Local APIC NMI] +[07Bh 0123 1] Length : 06 +[07Ch 0124 1] Processor ID : FF +[07Dh 0125 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[07Fh 0127 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 128 (0x80) + + 0000: 41 50 49 43 80 00 00 00 01 DA 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 01 0C 00 00 // ................ + 0040: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0050: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0060: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0070: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/pc/APIC.bridge b/tests/data/acpi/pc/APIC.bridge Binary files differnew file mode 100644 index 0000000000..84509e0ae4 --- /dev/null +++ b/tests/data/acpi/pc/APIC.bridge diff --git a/tests/data/acpi/pc/APIC.bridge.dsl b/tests/data/acpi/pc/APIC.bridge.dsl new file mode 100644 index 0000000000..2828370063 --- /dev/null +++ b/tests/data/acpi/pc/APIC.bridge.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.cphp.dsl b/tests/data/acpi/pc/APIC.cphp.dsl new file mode 100644 index 0000000000..b4b043229a --- /dev/null +++ b/tests/data/acpi/pc/APIC.cphp.dsl @@ -0,0 +1,146 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 000000A0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 7B +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] +[03Dh 0061 1] Length : 08 +[03Eh 0062 1] Processor ID : 02 +[03Fh 0063 1] Local Apic ID : 02 +[040h 0064 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[044h 0068 1] Subtable Type : 00 [Processor Local APIC] +[045h 0069 1] Length : 08 +[046h 0070 1] Processor ID : 03 +[047h 0071 1] Local Apic ID : 04 +[048h 0072 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[04Ch 0076 1] Subtable Type : 00 [Processor Local APIC] +[04Dh 0077 1] Length : 08 +[04Eh 0078 1] Processor ID : 04 +[04Fh 0079 1] Local Apic ID : 05 +[050h 0080 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[054h 0084 1] Subtable Type : 00 [Processor Local APIC] +[055h 0085 1] Length : 08 +[056h 0086 1] Processor ID : 05 +[057h 0087 1] Local Apic ID : 06 +[058h 0088 4] Flags (decoded below) : 00000000 + Processor Enabled : 0 + Runtime Online Capable : 0 + +[05Ch 0092 1] Subtable Type : 01 [I/O APIC] +[05Dh 0093 1] Length : 0C +[05Eh 0094 1] I/O Apic ID : 00 +[05Fh 0095 1] Reserved : 00 +[060h 0096 4] Address : FEC00000 +[064h 0100 4] Interrupt : 00000000 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 00 +[06Ch 0108 4] Interrupt : 00000002 +[070h 0112 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[072h 0114 1] Subtable Type : 02 [Interrupt Source Override] +[073h 0115 1] Length : 0A +[074h 0116 1] Bus : 00 +[075h 0117 1] Source : 05 +[076h 0118 4] Interrupt : 00000005 +[07Ah 0122 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[07Ch 0124 1] Subtable Type : 02 [Interrupt Source Override] +[07Dh 0125 1] Length : 0A +[07Eh 0126 1] Bus : 00 +[07Fh 0127 1] Source : 09 +[080h 0128 4] Interrupt : 00000009 +[084h 0132 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[086h 0134 1] Subtable Type : 02 [Interrupt Source Override] +[087h 0135 1] Length : 0A +[088h 0136 1] Bus : 00 +[089h 0137 1] Source : 0A +[08Ah 0138 4] Interrupt : 0000000A +[08Eh 0142 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[090h 0144 1] Subtable Type : 02 [Interrupt Source Override] +[091h 0145 1] Length : 0A +[092h 0146 1] Bus : 00 +[093h 0147 1] Source : 0B +[094h 0148 4] Interrupt : 0000000B +[098h 0152 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[09Ah 0154 1] Subtable Type : 04 [Local APIC NMI] +[09Bh 0155 1] Length : 06 +[09Ch 0156 1] Processor ID : FF +[09Dh 0157 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[09Fh 0159 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 160 (0xA0) + + 0000: 41 50 49 43 A0 00 00 00 01 7B 42 4F 43 48 53 20 // APIC.....{BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................ + 0040: 00 00 00 00 00 08 03 04 00 00 00 00 00 08 04 05 // ................ + 0050: 00 00 00 00 00 08 05 06 00 00 00 00 01 0C 00 00 // ................ + 0060: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0070: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0080: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0090: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/pc/APIC.dimmpxm.dsl b/tests/data/acpi/pc/APIC.dimmpxm.dsl new file mode 100644 index 0000000000..adabdcc603 --- /dev/null +++ b/tests/data/acpi/pc/APIC.dimmpxm.dsl @@ -0,0 +1,129 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000090 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : AE +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 00 [Processor Local APIC] +[035h 0053 1] Length : 08 +[036h 0054 1] Processor ID : 01 +[037h 0055 1] Local Apic ID : 01 +[038h 0056 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[03Ch 0060 1] Subtable Type : 00 [Processor Local APIC] +[03Dh 0061 1] Length : 08 +[03Eh 0062 1] Processor ID : 02 +[03Fh 0063 1] Local Apic ID : 02 +[040h 0064 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[044h 0068 1] Subtable Type : 00 [Processor Local APIC] +[045h 0069 1] Length : 08 +[046h 0070 1] Processor ID : 03 +[047h 0071 1] Local Apic ID : 03 +[048h 0072 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[04Ch 0076 1] Subtable Type : 01 [I/O APIC] +[04Dh 0077 1] Length : 0C +[04Eh 0078 1] I/O Apic ID : 00 +[04Fh 0079 1] Reserved : 00 +[050h 0080 4] Address : FEC00000 +[054h 0084 4] Interrupt : 00000000 + +[058h 0088 1] Subtable Type : 02 [Interrupt Source Override] +[059h 0089 1] Length : 0A +[05Ah 0090 1] Bus : 00 +[05Bh 0091 1] Source : 00 +[05Ch 0092 4] Interrupt : 00000002 +[060h 0096 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[062h 0098 1] Subtable Type : 02 [Interrupt Source Override] +[063h 0099 1] Length : 0A +[064h 0100 1] Bus : 00 +[065h 0101 1] Source : 05 +[066h 0102 4] Interrupt : 00000005 +[06Ah 0106 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[06Ch 0108 1] Subtable Type : 02 [Interrupt Source Override] +[06Dh 0109 1] Length : 0A +[06Eh 0110 1] Bus : 00 +[06Fh 0111 1] Source : 09 +[070h 0112 4] Interrupt : 00000009 +[074h 0116 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[076h 0118 1] Subtable Type : 02 [Interrupt Source Override] +[077h 0119 1] Length : 0A +[078h 0120 1] Bus : 00 +[079h 0121 1] Source : 0A +[07Ah 0122 4] Interrupt : 0000000A +[07Eh 0126 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[080h 0128 1] Subtable Type : 02 [Interrupt Source Override] +[081h 0129 1] Length : 0A +[082h 0130 1] Bus : 00 +[083h 0131 1] Source : 0B +[084h 0132 4] Interrupt : 0000000B +[088h 0136 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[08Ah 0138 1] Subtable Type : 04 [Local APIC NMI] +[08Bh 0139 1] Length : 06 +[08Ch 0140 1] Processor ID : FF +[08Dh 0141 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[08Fh 0143 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 144 (0x90) + + 0000: 41 50 49 43 90 00 00 00 01 AE 42 4F 43 48 53 20 // APIC......BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 00 08 01 01 01 00 00 00 00 08 02 02 // ................ + 0040: 01 00 00 00 00 08 03 03 01 00 00 00 01 0C 00 00 // ................ + 0050: 00 00 C0 FE 00 00 00 00 02 0A 00 00 02 00 00 00 // ................ + 0060: 00 00 02 0A 00 05 05 00 00 00 0D 00 02 0A 00 09 // ................ + 0070: 09 00 00 00 0D 00 02 0A 00 0A 0A 00 00 00 0D 00 // ................ + 0080: 02 0A 00 0B 0B 00 00 00 0D 00 04 06 FF 00 00 01 // ................ diff --git a/tests/data/acpi/pc/APIC.dsl b/tests/data/acpi/pc/APIC.dsl new file mode 100644 index 0000000000..d9516fc1f2 --- /dev/null +++ b/tests/data/acpi/pc/APIC.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.hpbridge b/tests/data/acpi/pc/APIC.hpbridge Binary files differnew file mode 100644 index 0000000000..84509e0ae4 --- /dev/null +++ b/tests/data/acpi/pc/APIC.hpbridge diff --git a/tests/data/acpi/pc/APIC.ipmikcs b/tests/data/acpi/pc/APIC.ipmikcs Binary files differnew file mode 100644 index 0000000000..84509e0ae4 --- /dev/null +++ b/tests/data/acpi/pc/APIC.ipmikcs diff --git a/tests/data/acpi/pc/APIC.ipmikcs.dsl b/tests/data/acpi/pc/APIC.ipmikcs.dsl new file mode 100644 index 0000000000..28198bed68 --- /dev/null +++ b/tests/data/acpi/pc/APIC.ipmikcs.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.memhp b/tests/data/acpi/pc/APIC.memhp Binary files differnew file mode 100644 index 0000000000..84509e0ae4 --- /dev/null +++ b/tests/data/acpi/pc/APIC.memhp diff --git a/tests/data/acpi/pc/APIC.memhp.dsl b/tests/data/acpi/pc/APIC.memhp.dsl new file mode 100644 index 0000000000..b8449c0bde --- /dev/null +++ b/tests/data/acpi/pc/APIC.memhp.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.numamem b/tests/data/acpi/pc/APIC.numamem Binary files differnew file mode 100644 index 0000000000..84509e0ae4 --- /dev/null +++ b/tests/data/acpi/pc/APIC.numamem diff --git a/tests/data/acpi/pc/APIC.numamem.dsl b/tests/data/acpi/pc/APIC.numamem.dsl new file mode 100644 index 0000000000..d75e4283d1 --- /dev/null +++ b/tests/data/acpi/pc/APIC.numamem.dsl @@ -0,0 +1,104 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/APIC.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [APIC] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "APIC" [Multiple APIC Description Table (MADT)] +[004h 0004 4] Table Length : 00000078 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : ED +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCAPIC" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Local Apic Address : FEE00000 +[028h 0040 4] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[02Ch 0044 1] Subtable Type : 00 [Processor Local APIC] +[02Dh 0045 1] Length : 08 +[02Eh 0046 1] Processor ID : 00 +[02Fh 0047 1] Local Apic ID : 00 +[030h 0048 4] Flags (decoded below) : 00000001 + Processor Enabled : 1 + Runtime Online Capable : 0 + +[034h 0052 1] Subtable Type : 01 [I/O APIC] +[035h 0053 1] Length : 0C +[036h 0054 1] I/O Apic ID : 00 +[037h 0055 1] Reserved : 00 +[038h 0056 4] Address : FEC00000 +[03Ch 0060 4] Interrupt : 00000000 + +[040h 0064 1] Subtable Type : 02 [Interrupt Source Override] +[041h 0065 1] Length : 0A +[042h 0066 1] Bus : 00 +[043h 0067 1] Source : 00 +[044h 0068 4] Interrupt : 00000002 +[048h 0072 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[04Ah 0074 1] Subtable Type : 02 [Interrupt Source Override] +[04Bh 0075 1] Length : 0A +[04Ch 0076 1] Bus : 00 +[04Dh 0077 1] Source : 05 +[04Eh 0078 4] Interrupt : 00000005 +[052h 0082 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[054h 0084 1] Subtable Type : 02 [Interrupt Source Override] +[055h 0085 1] Length : 0A +[056h 0086 1] Bus : 00 +[057h 0087 1] Source : 09 +[058h 0088 4] Interrupt : 00000009 +[05Ch 0092 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[05Eh 0094 1] Subtable Type : 02 [Interrupt Source Override] +[05Fh 0095 1] Length : 0A +[060h 0096 1] Bus : 00 +[061h 0097 1] Source : 0A +[062h 0098 4] Interrupt : 0000000A +[066h 0102 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[068h 0104 1] Subtable Type : 02 [Interrupt Source Override] +[069h 0105 1] Length : 0A +[06Ah 0106 1] Bus : 00 +[06Bh 0107 1] Source : 0B +[06Ch 0108 4] Interrupt : 0000000B +[070h 0112 2] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 + +[072h 0114 1] Subtable Type : 04 [Local APIC NMI] +[073h 0115 1] Length : 06 +[074h 0116 1] Processor ID : FF +[075h 0117 2] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 +[077h 0119 1] Interrupt Input LINT : 01 + +Raw Table Data: Length 120 (0x78) + + 0000: 41 50 49 43 78 00 00 00 01 ED 42 4F 43 48 53 20 // APICx.....BOCHS + 0010: 42 58 50 43 41 50 49 43 01 00 00 00 42 58 50 43 // BXPCAPIC....BXPC + 0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00 // ................ + 0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00 // ................ + 0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00 // ................ + 0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A // ................ + 0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00 // ................ + 0070: 0D 00 04 06 FF 00 00 01 // ........ diff --git a/tests/data/acpi/pc/APIC.roothp b/tests/data/acpi/pc/APIC.roothp Binary files differnew file mode 100644 index 0000000000..84509e0ae4 --- /dev/null +++ b/tests/data/acpi/pc/APIC.roothp diff --git a/tests/data/acpi/pc/DSDT.acpihmat.dsl b/tests/data/acpi/pc/DSDT.acpihmat.dsl new file mode 100644 index 0000000000..b2a4b1bd7f --- /dev/null +++ b/tests/data/acpi/pc/DSDT.acpihmat.dsl @@ -0,0 +1,1619 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001872 (6258) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x8E + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x02) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x00000001C0000000, // Range Minimum + 0x000000023FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.bridge.dsl b/tests/data/acpi/pc/DSDT.bridge.dsl new file mode 100644 index 0000000000..3311b57ecb --- /dev/null +++ b/tests/data/acpi/pc/DSDT.bridge.dsl @@ -0,0 +1,1800 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.bridge, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001A89 (6793) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x09 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_ADR, 0x00030000) // _ADR: Address + Name (BSEL, One) + Device (S00) + { + Name (_SUN, Zero) // _SUN: Slot User Number + Name (_ADR, Zero) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S08) + { + Name (_SUN, One) // _SUN: Slot User Number + Name (_ADR, 0x00010000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S10) + { + Name (_SUN, 0x02) // _SUN: Slot User Number + Name (_ADR, 0x00020000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & One)) + { + Notify (S00, Arg1) + } + + If ((Arg0 & 0x02)) + { + Notify (S08, Arg1) + } + + If ((Arg0 & 0x04)) + { + Notify (S10, Arg1) + } + + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = One + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + ^S18.PCNT () + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.cphp.dsl b/tests/data/acpi/pc/DSDT.cphp.dsl new file mode 100644 index 0000000000..22ed37d7dc --- /dev/null +++ b/tests/data/acpi/pc/DSDT.cphp.dsl @@ -0,0 +1,1466 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.cphp, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001515 (5397) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x39 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (C002, Arg1) + } + + If ((Arg0 == 0x03)) + { + Notify (C003, Arg1) + } + + If ((Arg0 == 0x04)) + { + Notify (C004, Arg1) + } + + If ((Arg0 == 0x05)) + { + Notify (C005, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C002, 0x02, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x02)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x02) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x02, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C003, 0x03, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x03)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x03, 0x04, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x03) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x03, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C004, 0x04, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x04)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x04, 0x05, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x04) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x04, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C005, 0x05, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x05)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x05, 0x06, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x05) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x05, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.dimmpxm.dsl b/tests/data/acpi/pc/DSDT.dimmpxm.dsl new file mode 100644 index 0000000000..798056147b --- /dev/null +++ b/tests/data/acpi/pc/DSDT.dimmpxm.dsl @@ -0,0 +1,1719 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x000019BB (6587) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x21 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + External (_SB_.NVDR, UnknownObj) + + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + + If ((Arg0 == One)) + { + Notify (C001, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (C002, Arg1) + } + + If ((Arg0 == 0x03)) + { + Notify (C003, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + + Processor (C001, 0x01, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (One)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (One) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (One, Arg0, Arg1, Arg2) + } + + Name (_PXM, One) // _PXM: Device Proximity + } + + Processor (C002, 0x02, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x02)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x02) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x02, Arg0, Arg1, Arg2) + } + + Name (_PXM, 0x02) // _PXM: Device Proximity + } + + Processor (C003, 0x03, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (0x03)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x03, 0x03, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + CEJ0 (0x03) + } + + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (0x03, Arg0, Arg1, Arg2) + } + + Name (_PXM, 0x03) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x03) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP02) + { + Name (_UID, "0x02") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (MP02, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + + Method (_E04, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Notify (\_SB.NVDR, 0x80) // Status Change + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000200000000, // Range Minimum + 0x000000027FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.dsl b/tests/data/acpi/pc/DSDT.dsl new file mode 100644 index 0000000000..da2b413efc --- /dev/null +++ b/tests/data/acpi/pc/DSDT.dsl @@ -0,0 +1,1407 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.roothp, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001488 (5256) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0xF2 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Name (CNEW, Package (0xFF){}) + Local3 = Zero + Local4 = One + While ((Local4 == One)) + { + Local4 = Zero + Local0 = One + Local1 = Zero + While (((Local0 == One) && (Local3 < One))) + { + Local0 = Zero + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CDAT < Local3)) + { + Break + } + + If ((Local1 == 0xFF)) + { + Local4 = One + Break + } + + Local3 = \_SB.PCI0.PRES.CDAT + If ((\_SB.PCI0.PRES.CINS == One)) + { + CNEW [Local1] = Local3 + Local1++ + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (Local3, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + + Local3++ + } + + Local2 = Zero + While ((Local2 < Local1)) + { + Local3 = DerefOf (CNEW [Local2]) + CTFY (Local3, One) + Debug = Local3 + \_SB.PCI0.PRES.CSEL = Local3 + \_SB.PCI0.PRES.CINS = One + Local2++ + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_ADR, 0x00030000) // _ADR: Address + Name (BSEL, Zero) + Device (S00) + { + Name (_SUN, Zero) // _SUN: Slot User Number + Name (_ADR, Zero) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S08) + { + Name (_SUN, One) // _SUN: Slot User Number + Name (_ADR, 0x00010000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S10) + { + Name (_SUN, 0x02) // _SUN: Slot User Number + Name (_ADR, 0x00020000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & One)) + { + Notify (S00, Arg1) + } + + If ((Arg0 & 0x02)) + { + Notify (S08, Arg1) + } + + If ((Arg0 & 0x04)) + { + Notify (S10, Arg1) + } + + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + + Method (PCNT, 0, NotSerialized) + { + ^S18.PCNT () + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge Binary files differindex b075139854..56032bcf1b 100644 --- a/tests/data/acpi/pc/DSDT.hpbridge +++ b/tests/data/acpi/pc/DSDT.hpbridge diff --git a/tests/data/acpi/pc/DSDT.ipmikcs.dsl b/tests/data/acpi/pc/DSDT.ipmikcs.dsl new file mode 100644 index 0000000000..2e4b524ab8 --- /dev/null +++ b/tests/data/acpi/pc/DSDT.ipmikcs.dsl @@ -0,0 +1,1337 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x0000138E (5006) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x54 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (MI1) + { + Name (_HID, EisaId ("IPI0001")) // _HID: Hardware ID + Name (_STR, "ipmi_kcs") // _STR: Description String + Name (_UID, One) // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0CA2, // Range Minimum + 0x0CA3, // Range Maximum + 0x01, // Alignment + 0x02, // Length + ) + }) + Name (_IFT, One) // _IFT: IPMI Interface Type + Name (_SRV, 0x0200) // _SRV: IPMI Spec Revision + } + + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.memhp.dsl b/tests/data/acpi/pc/DSDT.memhp.dsl new file mode 100644 index 0000000000..299315051e --- /dev/null +++ b/tests/data/acpi/pc/DSDT.memhp.dsl @@ -0,0 +1,1625 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.memhp, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x00001895 (6293) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0xB2 + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Device (\_SB.PCI0.MHPD) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "Memory hotplug resources") // _UID: Unique ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0A00, // Range Minimum + 0x0A00, // Range Maximum + 0x00, // Alignment + 0x18, // Length + ) + }) + OperationRegion (HPMR, SystemIO, 0x0A00, 0x18) + } + + Device (\_SB.MHPC) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "DIMM devices") // _UID: Unique ID + Name (MDNR, 0x03) + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MRBL, 32, + MRBH, 32, + MRLL, 32, + MRLH, 32, + MPX, 32 + } + + Field (\_SB.PCI0.MHPD.HPMR, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x14), + MES, 1, + MINS, 1, + MRMV, 1, + MEJ, 1 + } + + Field (\_SB.PCI0.MHPD.HPMR, DWordAcc, NoLock, Preserve) + { + MSEL, 32, + MOEV, 32, + MOSC, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Return (0x0B) + } + + Mutex (MLCK, 0x00) + Method (MSCN, 0, NotSerialized) + { + If ((MDNR == Zero)) + { + Return (Zero) + } + + Local0 = Zero + Acquire (MLCK, 0xFFFF) + While ((Local0 < MDNR)) + { + MSEL = Local0 + If ((MINS == One)) + { + MTFY (Local0, One) + MINS = One + } + ElseIf ((MRMV == One)) + { + MTFY (Local0, 0x03) + MRMV = One + } + + Local0 += One + } + + Release (MLCK) + Return (One) + } + + Method (MRST, 1, NotSerialized) + { + Local0 = Zero + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + If ((MES == One)) + { + Local0 = 0x0F + } + + Release (MLCK) + Return (Local0) + } + + Method (MCRS, 1, Serialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Name (MR64, ResourceTemplate () + { + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000000000000, // Range Minimum + 0xFFFFFFFFFFFFFFFE, // Range Maximum + 0x0000000000000000, // Translation Offset + 0xFFFFFFFFFFFFFFFF, // Length + ,, _Y01, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MIN, MINL) // _MIN: Minimum Base Address + CreateDWordField (MR64, 0x12, MINH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._LEN, LENL) // _LEN: Length + CreateDWordField (MR64, 0x2A, LENH) + CreateDWordField (MR64, \_SB.MHPC.MCRS._Y01._MAX, MAXL) // _MAX: Maximum Base Address + CreateDWordField (MR64, 0x1A, MAXH) + MINH = MRBH /* \_SB_.MHPC.MRBH */ + MINL = MRBL /* \_SB_.MHPC.MRBL */ + LENH = MRLH /* \_SB_.MHPC.MRLH */ + LENL = MRLL /* \_SB_.MHPC.MRLL */ + MAXL = (MINL + LENL) /* \_SB_.MHPC.MCRS.LENL */ + MAXH = (MINH + LENH) /* \_SB_.MHPC.MCRS.LENH */ + If ((MAXL < MINL)) + { + MAXH += One + } + + If ((MAXL < One)) + { + MAXH -= One + } + + MAXL -= One + If ((MAXH == Zero)) + { + Name (MR32, ResourceTemplate () + { + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x00000000, // Range Minimum + 0xFFFFFFFE, // Range Maximum + 0x00000000, // Translation Offset + 0xFFFFFFFF, // Length + ,, _Y02, AddressRangeMemory, TypeStatic) + }) + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MIN, MIN) // _MIN: Minimum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._MAX, MAX) // _MAX: Maximum Base Address + CreateDWordField (MR32, \_SB.MHPC.MCRS._Y02._LEN, LEN) // _LEN: Length + MIN = MINL /* \_SB_.MHPC.MCRS.MINL */ + MAX = MAXL /* \_SB_.MHPC.MCRS.MAXL */ + LEN = LENL /* \_SB_.MHPC.MCRS.LENL */ + Release (MLCK) + Return (MR32) /* \_SB_.MHPC.MCRS.MR32 */ + } + + Release (MLCK) + Return (MR64) /* \_SB_.MHPC.MCRS.MR64 */ + } + + Method (MPXM, 1, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + Local0 = MPX /* \_SB_.MHPC.MPX_ */ + Release (MLCK) + Return (Local0) + } + + Method (MOST, 4, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MOEV = Arg1 + MOSC = Arg2 + Release (MLCK) + } + + Method (MEJ0, 2, NotSerialized) + { + Acquire (MLCK, 0xFFFF) + MSEL = ToInteger (Arg0) + MEJ = One + Release (MLCK) + } + + Device (MP00) + { + Name (_UID, "0x00") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP01) + { + Name (_UID, "0x01") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Device (MP02) + { + Name (_UID, "0x02") // _UID: Unique ID + Name (_HID, EisaId ("PNP0C80") /* Memory Device */) // _HID: Hardware ID + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (MCRS (_UID)) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (MRST (_UID)) + } + + Method (_PXM, 0, NotSerialized) // _PXM: Device Proximity + { + Return (MPXM (_UID)) + } + + Method (_OST, 3, NotSerialized) // _OST: OSPM Status Indication + { + MOST (_UID, Arg0, Arg1, Arg2) + } + + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + MEJ0 (_UID, Arg0) + } + } + + Method (MTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (MP00, Arg1) + } + + If ((Arg0 == One)) + { + Notify (MP01, Arg1) + } + + If ((Arg0 == 0x02)) + { + Notify (MP02, Arg1) + } + } + } + + Method (\_GPE._E03, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.MHPC.MSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000200000000, // Range Minimum + 0x000000027FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.numamem.dsl b/tests/data/acpi/pc/DSDT.numamem.dsl new file mode 100644 index 0000000000..3d08447f1e --- /dev/null +++ b/tests/data/acpi/pc/DSDT.numamem.dsl @@ -0,0 +1,1321 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/DSDT.numamem, Tue Aug 4 11:14:15 2020 + * + * Original Table Header: + * Signature "DSDT" + * Length 0x0000134C (4940) + * Revision 0x01 **** 32-bit table (V1), no 64-bit math support + * Checksum 0x6A + * OEM ID "BOCHS " + * OEM Table ID "BXPCDSDT" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPCDSDT", 0x00000001) +{ + Scope (\) + { + OperationRegion (DBG, SystemIO, 0x0402, One) + Field (DBG, ByteAcc, NoLock, Preserve) + { + DBGB, 8 + } + + Method (DBUG, 1, NotSerialized) + { + ToHexString (Arg0, Local0) + ToBuffer (Local0, Local0) + Local1 = (SizeOf (Local0) - One) + Local2 = Zero + While ((Local2 < Local1)) + { + DBGB = DerefOf (Local0 [Local2]) + Local2++ + } + + DBGB = 0x0A + } + } + + Scope (_SB) + { + Device (PCI0) + { + Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID + Name (_ADR, Zero) // _ADR: Address + Name (_UID, Zero) // _UID: Unique ID + } + } + + Scope (_SB) + { + Device (HPET) + { + Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + OperationRegion (HPTM, SystemMemory, 0xFED00000, 0x0400) + Field (HPTM, DWordAcc, Lock, Preserve) + { + VEND, 32, + PRD, 32 + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + Local0 = VEND /* \_SB_.HPET.VEND */ + Local1 = PRD /* \_SB_.HPET.PRD_ */ + Local0 >>= 0x10 + If (((Local0 == Zero) || (Local0 == 0xFFFF))) + { + Return (Zero) + } + + If (((Local1 == Zero) || (Local1 > 0x05F5E100))) + { + Return (Zero) + } + + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + Memory32Fixed (ReadOnly, + 0xFED00000, // Address Base + 0x00000400, // Address Length + ) + }) + } + } + + Scope (_SB.PCI0) + { + Device (ISA) + { + Name (_ADR, 0x00010000) // _ADR: Address + OperationRegion (P40C, PCI_Config, 0x60, 0x04) + } + } + + Scope (_SB.PCI0.ISA) + { + Device (KBD) + { + Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0060, // Range Minimum + 0x0060, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IO (Decode16, + 0x0064, // Range Minimum + 0x0064, // Range Maximum + 0x01, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {1} + }) + } + + Device (MOU) + { + Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IRQNoFlags () + {12} + }) + } + + Device (FDC0) + { + Name (_HID, EisaId ("PNP0700")) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F2, // Range Minimum + 0x03F2, // Range Maximum + 0x00, // Alignment + 0x04, // Length + ) + IO (Decode16, + 0x03F7, // Range Minimum + 0x03F7, // Range Maximum + 0x00, // Alignment + 0x01, // Length + ) + IRQNoFlags () + {6} + DMA (Compatibility, NotBusMaster, Transfer8, ) + {2} + }) + Device (FLPA) + { + Name (_ADR, Zero) // _ADR: Address + Name (_FDI, Package (0x10) // _FDI: Floppy Drive Information + { + Zero, + 0x05, + 0x4F, + 0x30, + One, + 0xAF, + 0x02, + 0x25, + 0x02, + 0x12, + 0x1B, + 0xFF, + 0x6C, + 0xF6, + 0x0F, + 0x08 + }) + } + + Name (_FDE, Buffer (0x14) // _FDE: Floppy Disk Enumerate + { + /* 0000 */ 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // ........ + /* 0010 */ 0x02, 0x00, 0x00, 0x00 // .... + }) + } + + Device (LPT1) + { + Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0378, // Range Minimum + 0x0378, // Range Maximum + 0x08, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {7} + }) + } + + Device (COM1) + { + Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_STA, 0x0F) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x03F8, // Range Minimum + 0x03F8, // Range Maximum + 0x00, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {4} + }) + } + + Device (RTC) + { + Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0070, // Range Minimum + 0x0070, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + IRQNoFlags () + {8} + }) + } + } + + Scope (_SB.PCI0) + { + OperationRegion (PCST, SystemIO, 0xAE00, 0x08) + Field (PCST, DWordAcc, NoLock, WriteAsZeros) + { + PCIU, 32, + PCID, 32 + } + + OperationRegion (SEJ, SystemIO, 0xAE08, 0x04) + Field (SEJ, DWordAcc, NoLock, WriteAsZeros) + { + B0EJ, 32 + } + + OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + Field (BNMR, DWordAcc, NoLock, WriteAsZeros) + { + BNUM, 32 + } + + Mutex (BLCK, 0x00) + Method (PCEJ, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + B0EJ = (One << Arg1) + Release (BLCK) + Return (Zero) + } + } + + Scope (_SB) + { + Scope (PCI0) + { + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + If ((Local1 == 0x04)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKS, + Zero + } + } + Else + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + } + + Field (PCI0.ISA.P40C, ByteAcc, NoLock, Preserve) + { + PRQ0, 8, + PRQ1, 8, + PRQ2, 8, + PRQ3, 8 + } + + Method (IQST, 1, NotSerialized) + { + If ((0x80 & Arg0)) + { + Return (0x09) + } + + Return (0x0B) + } + + Method (IQCR, 1, Serialized) + { + Name (PRR0, ResourceTemplate () + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, _Y00) + { + 0x00000000, + } + }) + CreateDWordField (PRR0, \_SB.IQCR._Y00._INT, PRRI) // _INT: Interrupts + If ((Arg0 < 0x80)) + { + PRRI = Arg0 + } + + Return (PRR0) /* \_SB_.IQCR.PRR0 */ + } + + Device (LNKA) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, Zero) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ0)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ0 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ0)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ0 = PRRI /* \_SB_.LNKA._SRS.PRRI */ + } + } + + Device (LNKB) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, One) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ1)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ1 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ1)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ1 = PRRI /* \_SB_.LNKB._SRS.PRRI */ + } + } + + Device (LNKC) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x02) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ2)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ2 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ2)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ2 = PRRI /* \_SB_.LNKC._SRS.PRRI */ + } + } + + Device (LNKD) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x03) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000005, + 0x0000000A, + 0x0000000B, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (IQST (PRQ3)) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + PRQ3 |= 0x80 + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (IQCR (PRQ3)) + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + CreateDWordField (Arg0, 0x05, PRRI) + PRQ3 = PRRI /* \_SB_.LNKD._SRS.PRRI */ + } + } + + Device (LNKS) + { + Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID + Name (_UID, 0x04) // _UID: Unique ID + Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings + { + Interrupt (ResourceConsumer, Level, ActiveHigh, Shared, ,, ) + { + 0x00000009, + } + }) + Method (_STA, 0, NotSerialized) // _STA: Status + { + Return (0x0B) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Return (_PRS) /* \_SB_.LNKS._PRS */ + } + + Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings + { + } + } + } + + Scope (_SB) + { + Device (\_SB.PCI0.PRES) + { + Name (_HID, EisaId ("PNP0A06") /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "CPU Hotplug resources") // _UID: Unique ID + Mutex (CPLK, 0x00) + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAF00, // Range Minimum + 0xAF00, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + OperationRegion (PRST, SystemIO, 0xAF00, 0x0C) + Field (PRST, ByteAcc, NoLock, WriteAsZeros) + { + Offset (0x04), + CPEN, 1, + CINS, 1, + CRMV, 1, + CEJ0, 1, + Offset (0x05), + CCMD, 8 + } + + Field (PRST, DWordAcc, NoLock, Preserve) + { + CSEL, 32, + Offset (0x08), + CDAT, 32 + } + + Method (_INI, 0, Serialized) // _INI: Initialize + { + CSEL = Zero + } + } + + Device (\_SB.CPUS) + { + Name (_HID, "ACPI0010" /* Processor Container Device */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A05") /* Generic Container Device */) // _CID: Compatible ID + Method (CTFY, 2, NotSerialized) + { + If ((Arg0 == Zero)) + { + Notify (C000, Arg1) + } + } + + Method (CSTA, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + Local0 = Zero + If ((\_SB.PCI0.PRES.CPEN == One)) + { + Local0 = 0x0F + } + + Release (\_SB.PCI0.PRES.CPLK) + Return (Local0) + } + + Method (CEJ0, 1, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CEJ0 = One + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (CSCN, 0, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + Local0 = One + While ((Local0 == One)) + { + Local0 = Zero + \_SB.PCI0.PRES.CCMD = Zero + If ((\_SB.PCI0.PRES.CINS == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, One) + \_SB.PCI0.PRES.CINS = One + Local0 = One + } + ElseIf ((\_SB.PCI0.PRES.CRMV == One)) + { + CTFY (\_SB.PCI0.PRES.CDAT, 0x03) + \_SB.PCI0.PRES.CRMV = One + Local0 = One + } + } + + Release (\_SB.PCI0.PRES.CPLK) + } + + Method (COST, 4, Serialized) + { + Acquire (\_SB.PCI0.PRES.CPLK, 0xFFFF) + \_SB.PCI0.PRES.CSEL = Arg0 + \_SB.PCI0.PRES.CCMD = One + \_SB.PCI0.PRES.CDAT = Arg1 + \_SB.PCI0.PRES.CCMD = 0x02 + \_SB.PCI0.PRES.CDAT = Arg2 + Release (\_SB.PCI0.PRES.CPLK) + } + + Processor (C000, 0x00, 0x00000000, 0x00) + { + Method (_STA, 0, Serialized) // _STA: Status + { + Return (CSTA (Zero)) + } + + Name (_MAT, Buffer (0x08) // _MAT: Multiple APIC Table Entry + { + 0x00, 0x08, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 // ........ + }) + Method (_OST, 3, Serialized) // _OST: OSPM Status Indication + { + COST (Zero, Arg0, Arg1, Arg2) + } + + Name (_PXM, Zero) // _PXM: Device Proximity + } + } + } + + Method (\_GPE._E02, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + \_SB.CPUS.CSCN () + } + + Scope (_GPE) + { + Name (_HID, "ACPI0006" /* GPE Block Device */) // _HID: Hardware ID + Method (_E01, 0, NotSerialized) // _Exx: Edge-Triggered GPE, xx=0x00-0xFF + { + Acquire (\_SB.PCI0.BLCK, 0xFFFF) + \_SB.PCI0.PCNT () + Release (\_SB.PCI0.BLCK) + } + } + + Scope (\_SB.PCI0) + { + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x00FF, // Range Maximum + 0x0000, // Translation Offset + 0x0100, // Length + ,, ) + IO (Decode16, + 0x0CF8, // Range Minimum + 0x0CF8, // Range Maximum + 0x01, // Alignment + 0x08, // Length + ) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0000, // Range Minimum + 0x0CF7, // Range Maximum + 0x0000, // Translation Offset + 0x0CF8, // Length + ,, , TypeStatic, DenseTranslation) + WordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, + 0x0000, // Granularity + 0x0D00, // Range Minimum + 0xFFFF, // Range Maximum + 0x0000, // Translation Offset + 0xF300, // Length + ,, , TypeStatic, DenseTranslation) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x00000000, // Granularity + 0x000A0000, // Range Minimum + 0x000BFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0x00020000, // Length + ,, , AddressRangeMemory, TypeStatic) + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Granularity + 0x08000000, // Range Minimum + 0xFEBFFFFF, // Range Maximum + 0x00000000, // Translation Offset + 0xF6C00000, // Length + ,, , AddressRangeMemory, TypeStatic) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, + 0x0000000000000000, // Granularity + 0x0000000100000000, // Range Minimum + 0x000000017FFFFFFF, // Range Maximum + 0x0000000000000000, // Translation Offset + 0x0000000080000000, // Length + ,, , AddressRangeMemory, TypeStatic) + }) + Device (GPE0) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "GPE0 resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAFE0, // Range Minimum + 0xAFE0, // Range Maximum + 0x01, // Alignment + 0x04, // Length + ) + }) + } + + Device (PHPR) + { + Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID + Name (_UID, "PCI Hotplug resources") // _UID: Unique ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0xAE00, // Range Minimum + 0xAE00, // Range Maximum + 0x01, // Alignment + 0x14, // Length + ) + }) + } + } + + Scope (\) + { + Name (_S3, Package (0x04) // _S3_: S3 System State + { + One, + One, + Zero, + Zero + }) + Name (_S4, Package (0x04) // _S4_: S4 System State + { + 0x02, + 0x02, + Zero, + Zero + }) + Name (_S5, Package (0x04) // _S5_: S5 System State + { + Zero, + Zero, + Zero, + Zero + }) + } + + Scope (\_SB.PCI0) + { + Device (FWCF) + { + Name (_HID, "QEMU0002") // _HID: Hardware ID + Name (_STA, 0x0B) // _STA: Status + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + IO (Decode16, + 0x0510, // Range Minimum + 0x0510, // Range Maximum + 0x01, // Alignment + 0x0C, // Length + ) + }) + } + } + + Scope (\_SB) + { + Scope (PCI0) + { + Name (BSEL, Zero) + Device (S00) + { + Name (_ADR, Zero) // _ADR: Address + } + + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State + { + Return (Zero) + } + + Method (_S2D, 0, NotSerialized) // _S2D: S2 Device State + { + Return (Zero) + } + + Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State + { + Return (Zero) + } + } + + Device (S18) + { + Name (_SUN, 0x03) // _SUN: Slot User Number + Name (_ADR, 0x00030000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S20) + { + Name (_SUN, 0x04) // _SUN: Slot User Number + Name (_ADR, 0x00040000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S28) + { + Name (_SUN, 0x05) // _SUN: Slot User Number + Name (_ADR, 0x00050000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S30) + { + Name (_SUN, 0x06) // _SUN: Slot User Number + Name (_ADR, 0x00060000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S38) + { + Name (_SUN, 0x07) // _SUN: Slot User Number + Name (_ADR, 0x00070000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S40) + { + Name (_SUN, 0x08) // _SUN: Slot User Number + Name (_ADR, 0x00080000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S48) + { + Name (_SUN, 0x09) // _SUN: Slot User Number + Name (_ADR, 0x00090000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S50) + { + Name (_SUN, 0x0A) // _SUN: Slot User Number + Name (_ADR, 0x000A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S58) + { + Name (_SUN, 0x0B) // _SUN: Slot User Number + Name (_ADR, 0x000B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S60) + { + Name (_SUN, 0x0C) // _SUN: Slot User Number + Name (_ADR, 0x000C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S68) + { + Name (_SUN, 0x0D) // _SUN: Slot User Number + Name (_ADR, 0x000D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S70) + { + Name (_SUN, 0x0E) // _SUN: Slot User Number + Name (_ADR, 0x000E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S78) + { + Name (_SUN, 0x0F) // _SUN: Slot User Number + Name (_ADR, 0x000F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S80) + { + Name (_SUN, 0x10) // _SUN: Slot User Number + Name (_ADR, 0x00100000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S88) + { + Name (_SUN, 0x11) // _SUN: Slot User Number + Name (_ADR, 0x00110000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S90) + { + Name (_SUN, 0x12) // _SUN: Slot User Number + Name (_ADR, 0x00120000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (S98) + { + Name (_SUN, 0x13) // _SUN: Slot User Number + Name (_ADR, 0x00130000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA0) + { + Name (_SUN, 0x14) // _SUN: Slot User Number + Name (_ADR, 0x00140000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SA8) + { + Name (_SUN, 0x15) // _SUN: Slot User Number + Name (_ADR, 0x00150000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB0) + { + Name (_SUN, 0x16) // _SUN: Slot User Number + Name (_ADR, 0x00160000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SB8) + { + Name (_SUN, 0x17) // _SUN: Slot User Number + Name (_ADR, 0x00170000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC0) + { + Name (_SUN, 0x18) // _SUN: Slot User Number + Name (_ADR, 0x00180000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SC8) + { + Name (_SUN, 0x19) // _SUN: Slot User Number + Name (_ADR, 0x00190000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD0) + { + Name (_SUN, 0x1A) // _SUN: Slot User Number + Name (_ADR, 0x001A0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SD8) + { + Name (_SUN, 0x1B) // _SUN: Slot User Number + Name (_ADR, 0x001B0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE0) + { + Name (_SUN, 0x1C) // _SUN: Slot User Number + Name (_ADR, 0x001C0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SE8) + { + Name (_SUN, 0x1D) // _SUN: Slot User Number + Name (_ADR, 0x001D0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF0) + { + Name (_SUN, 0x1E) // _SUN: Slot User Number + Name (_ADR, 0x001E0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Device (SF8) + { + Name (_SUN, 0x1F) // _SUN: Slot User Number + Name (_ADR, 0x001F0000) // _ADR: Address + Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9 + { + PCEJ (BSEL, _SUN) + } + } + + Method (DVNT, 2, NotSerialized) + { + If ((Arg0 & 0x08)) + { + Notify (S18, Arg1) + } + + If ((Arg0 & 0x10)) + { + Notify (S20, Arg1) + } + + If ((Arg0 & 0x20)) + { + Notify (S28, Arg1) + } + + If ((Arg0 & 0x40)) + { + Notify (S30, Arg1) + } + + If ((Arg0 & 0x80)) + { + Notify (S38, Arg1) + } + + If ((Arg0 & 0x0100)) + { + Notify (S40, Arg1) + } + + If ((Arg0 & 0x0200)) + { + Notify (S48, Arg1) + } + + If ((Arg0 & 0x0400)) + { + Notify (S50, Arg1) + } + + If ((Arg0 & 0x0800)) + { + Notify (S58, Arg1) + } + + If ((Arg0 & 0x1000)) + { + Notify (S60, Arg1) + } + + If ((Arg0 & 0x2000)) + { + Notify (S68, Arg1) + } + + If ((Arg0 & 0x4000)) + { + Notify (S70, Arg1) + } + + If ((Arg0 & 0x8000)) + { + Notify (S78, Arg1) + } + + If ((Arg0 & 0x00010000)) + { + Notify (S80, Arg1) + } + + If ((Arg0 & 0x00020000)) + { + Notify (S88, Arg1) + } + + If ((Arg0 & 0x00040000)) + { + Notify (S90, Arg1) + } + + If ((Arg0 & 0x00080000)) + { + Notify (S98, Arg1) + } + + If ((Arg0 & 0x00100000)) + { + Notify (SA0, Arg1) + } + + If ((Arg0 & 0x00200000)) + { + Notify (SA8, Arg1) + } + + If ((Arg0 & 0x00400000)) + { + Notify (SB0, Arg1) + } + + If ((Arg0 & 0x00800000)) + { + Notify (SB8, Arg1) + } + + If ((Arg0 & 0x01000000)) + { + Notify (SC0, Arg1) + } + + If ((Arg0 & 0x02000000)) + { + Notify (SC8, Arg1) + } + + If ((Arg0 & 0x04000000)) + { + Notify (SD0, Arg1) + } + + If ((Arg0 & 0x08000000)) + { + Notify (SD8, Arg1) + } + + If ((Arg0 & 0x10000000)) + { + Notify (SE0, Arg1) + } + + If ((Arg0 & 0x20000000)) + { + Notify (SE8, Arg1) + } + + If ((Arg0 & 0x40000000)) + { + Notify (SF0, Arg1) + } + + If ((Arg0 & 0x80000000)) + { + Notify (SF8, Arg1) + } + } + + Method (PCNT, 0, NotSerialized) + { + BNUM = Zero + DVNT (PCIU, One) + DVNT (PCID, 0x03) + } + } + } +} + diff --git a/tests/data/acpi/pc/DSDT.roothp b/tests/data/acpi/pc/DSDT.roothp Binary files differindex 886a5e6952..18caa0765f 100644 --- a/tests/data/acpi/pc/DSDT.roothp +++ b/tests/data/acpi/pc/DSDT.roothp diff --git a/tests/data/acpi/pc/FACP.acpihmat b/tests/data/acpi/pc/FACP.acpihmat Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.acpihmat diff --git a/tests/data/acpi/pc/FACP.acpihmat.dsl b/tests/data/acpi/pc/FACP.acpihmat.dsl new file mode 100644 index 0000000000..226fd58ec9 --- /dev/null +++ b/tests/data/acpi/pc/FACP.acpihmat.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.bridge b/tests/data/acpi/pc/FACP.bridge Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.bridge diff --git a/tests/data/acpi/pc/FACP.bridge.dsl b/tests/data/acpi/pc/FACP.bridge.dsl new file mode 100644 index 0000000000..11b371812d --- /dev/null +++ b/tests/data/acpi/pc/FACP.bridge.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.cphp b/tests/data/acpi/pc/FACP.cphp Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.cphp diff --git a/tests/data/acpi/pc/FACP.cphp.dsl b/tests/data/acpi/pc/FACP.cphp.dsl new file mode 100644 index 0000000000..affffe9b64 --- /dev/null +++ b/tests/data/acpi/pc/FACP.cphp.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.dimmpxm b/tests/data/acpi/pc/FACP.dimmpxm Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.dimmpxm diff --git a/tests/data/acpi/pc/FACP.dimmpxm.dsl b/tests/data/acpi/pc/FACP.dimmpxm.dsl new file mode 100644 index 0000000000..fd5a5ef375 --- /dev/null +++ b/tests/data/acpi/pc/FACP.dimmpxm.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.dsl b/tests/data/acpi/pc/FACP.dsl new file mode 100644 index 0000000000..c5e3718772 --- /dev/null +++ b/tests/data/acpi/pc/FACP.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.hpbridge b/tests/data/acpi/pc/FACP.hpbridge Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.hpbridge diff --git a/tests/data/acpi/pc/FACP.ipmikcs b/tests/data/acpi/pc/FACP.ipmikcs Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.ipmikcs diff --git a/tests/data/acpi/pc/FACP.ipmikcs.dsl b/tests/data/acpi/pc/FACP.ipmikcs.dsl new file mode 100644 index 0000000000..3f1dd018da --- /dev/null +++ b/tests/data/acpi/pc/FACP.ipmikcs.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.memhp b/tests/data/acpi/pc/FACP.memhp Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.memhp diff --git a/tests/data/acpi/pc/FACP.memhp.dsl b/tests/data/acpi/pc/FACP.memhp.dsl new file mode 100644 index 0000000000..b2c466e989 --- /dev/null +++ b/tests/data/acpi/pc/FACP.memhp.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.numamem b/tests/data/acpi/pc/FACP.numamem Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.numamem diff --git a/tests/data/acpi/pc/FACP.numamem.dsl b/tests/data/acpi/pc/FACP.numamem.dsl new file mode 100644 index 0000000000..34ed95d536 --- /dev/null +++ b/tests/data/acpi/pc/FACP.numamem.dsl @@ -0,0 +1,99 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACP.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACP] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACP" [Fixed ACPI Description Table (FADT)] +[004h 0004 4] Table Length : 00000074 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A1 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCFACP" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] FACS Address : 00000000 +[028h 0040 4] DSDT Address : 00000000 +[02Ch 0044 1] Model : 01 +[02Dh 0045 1] PM Profile : 00 [Unspecified] +[02Eh 0046 2] SCI Interrupt : 0009 +[030h 0048 4] SMI Command Port : 000000B2 +[034h 0052 1] ACPI Enable Value : F1 +[035h 0053 1] ACPI Disable Value : F0 +[036h 0054 1] S4BIOS Command : 00 +[037h 0055 1] P-State Control : 00 +[038h 0056 4] PM1A Event Block Address : 00000600 +[03Ch 0060 4] PM1B Event Block Address : 00000000 +[040h 0064 4] PM1A Control Block Address : 00000604 +[044h 0068 4] PM1B Control Block Address : 00000000 +[048h 0072 4] PM2 Control Block Address : 00000000 +[04Ch 0076 4] PM Timer Block Address : 00000608 +[050h 0080 4] GPE0 Block Address : 0000AFE0 +[054h 0084 4] GPE1 Block Address : 00000000 +[058h 0088 1] PM1 Event Block Length : 04 +[059h 0089 1] PM1 Control Block Length : 02 +[05Ah 0090 1] PM2 Control Block Length : 00 +[05Bh 0091 1] PM Timer Block Length : 04 +[05Ch 0092 1] GPE0 Block Length : 04 +[05Dh 0093 1] GPE1 Block Length : 00 +[05Eh 0094 1] GPE1 Base Offset : 00 +[05Fh 0095 1] _CST Support : 00 +[060h 0096 2] C2 Latency : 0FFF +[062h 0098 2] C3 Latency : 0FFF +[064h 0100 2] CPU Cache Size : 0000 +[066h 0102 2] Cache Flush Stride : 0000 +[068h 0104 1] Duty Cycle Offset : 00 +[069h 0105 1] Duty Cycle Width : 00 +[06Ah 0106 1] RTC Day Alarm Index : 00 +[06Bh 0107 1] RTC Month Alarm Index : 00 +[06Ch 0108 1] RTC Century Index : 32 +[06Dh 0109 2] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[06Fh 0111 1] Reserved : 00 +[070h 0112 4] Flags (decoded below) : 000080A5 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 0 + All CPUs support C1 (V1) : 1 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 0 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 1 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 0 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 1 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 0 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 0 + Low Power S0 Idle (V5) : 0 + +Raw Table Data: Length 116 (0x74) + + 0000: 46 41 43 50 74 00 00 00 01 A1 42 4F 43 48 53 20 // FACPt.....BOCHS + 0010: 42 58 50 43 46 41 43 50 01 00 00 00 42 58 50 43 // BXPCFACP....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 01 00 09 00 // ................ + 0030: B2 00 00 00 F1 F0 00 00 00 06 00 00 00 00 00 00 // ................ + 0040: 04 06 00 00 00 00 00 00 00 00 00 00 08 06 00 00 // ................ + 0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 // ................ + 0060: FF 0F FF 0F 00 00 00 00 00 00 00 00 32 00 00 00 // ............2... + 0070: A5 80 00 00 // .... diff --git a/tests/data/acpi/pc/FACP.roothp b/tests/data/acpi/pc/FACP.roothp Binary files differnew file mode 100644 index 0000000000..261ebdc5d1 --- /dev/null +++ b/tests/data/acpi/pc/FACP.roothp diff --git a/tests/data/acpi/pc/FACS.acpihmat b/tests/data/acpi/pc/FACS.acpihmat Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.acpihmat diff --git a/tests/data/acpi/pc/FACS.acpihmat.dsl b/tests/data/acpi/pc/FACS.acpihmat.dsl new file mode 100644 index 0000000000..bff165ba4e --- /dev/null +++ b/tests/data/acpi/pc/FACS.acpihmat.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.bridge b/tests/data/acpi/pc/FACS.bridge Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.bridge diff --git a/tests/data/acpi/pc/FACS.bridge.dsl b/tests/data/acpi/pc/FACS.bridge.dsl new file mode 100644 index 0000000000..981354f0f3 --- /dev/null +++ b/tests/data/acpi/pc/FACS.bridge.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.cphp b/tests/data/acpi/pc/FACS.cphp Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.cphp diff --git a/tests/data/acpi/pc/FACS.cphp.dsl b/tests/data/acpi/pc/FACS.cphp.dsl new file mode 100644 index 0000000000..bb44e525b9 --- /dev/null +++ b/tests/data/acpi/pc/FACS.cphp.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.dimmpxm b/tests/data/acpi/pc/FACS.dimmpxm Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.dimmpxm diff --git a/tests/data/acpi/pc/FACS.dimmpxm.dsl b/tests/data/acpi/pc/FACS.dimmpxm.dsl new file mode 100644 index 0000000000..e7586d3236 --- /dev/null +++ b/tests/data/acpi/pc/FACS.dimmpxm.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.dsl b/tests/data/acpi/pc/FACS.dsl new file mode 100644 index 0000000000..11d622cdf7 --- /dev/null +++ b/tests/data/acpi/pc/FACS.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.hpbridge b/tests/data/acpi/pc/FACS.hpbridge Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.hpbridge diff --git a/tests/data/acpi/pc/FACS.ipmikcs b/tests/data/acpi/pc/FACS.ipmikcs Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.ipmikcs diff --git a/tests/data/acpi/pc/FACS.ipmikcs.dsl b/tests/data/acpi/pc/FACS.ipmikcs.dsl new file mode 100644 index 0000000000..f4b7c9718c --- /dev/null +++ b/tests/data/acpi/pc/FACS.ipmikcs.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.memhp b/tests/data/acpi/pc/FACS.memhp Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.memhp diff --git a/tests/data/acpi/pc/FACS.memhp.dsl b/tests/data/acpi/pc/FACS.memhp.dsl new file mode 100644 index 0000000000..da2e230a62 --- /dev/null +++ b/tests/data/acpi/pc/FACS.memhp.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.numamem b/tests/data/acpi/pc/FACS.numamem Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.numamem diff --git a/tests/data/acpi/pc/FACS.numamem.dsl b/tests/data/acpi/pc/FACS.numamem.dsl new file mode 100644 index 0000000000..c856f8b230 --- /dev/null +++ b/tests/data/acpi/pc/FACS.numamem.dsl @@ -0,0 +1,32 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/FACS.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [FACS] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "FACS" +[004h 0004 4] Length : 00000040 +[008h 0008 4] Hardware Signature : 00000000 +[00Ch 0012 4] 32 Firmware Waking Vector : 00000000 +[010h 0016 4] Global Lock : 00000000 +[014h 0020 4] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[018h 0024 8] 64 Firmware Waking Vector : 0000000000000000 +[020h 0032 1] Version : 00 +[021h 0033 3] Reserved : 000000 +[024h 0036 4] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 + +Raw Table Data: Length 64 (0x40) + + 0000: 46 41 43 53 40 00 00 00 00 00 00 00 00 00 00 00 // FACS@........... + 0010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/FACS.roothp b/tests/data/acpi/pc/FACS.roothp Binary files differnew file mode 100644 index 0000000000..fc67ecc407 --- /dev/null +++ b/tests/data/acpi/pc/FACS.roothp diff --git a/tests/data/acpi/pc/HMAT.acpihmat.dsl b/tests/data/acpi/pc/HMAT.acpihmat.dsl new file mode 100644 index 0000000000..b55564d383 --- /dev/null +++ b/tests/data/acpi/pc/HMAT.acpihmat.dsl @@ -0,0 +1,132 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HMAT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HMAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 98 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHMAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[02Ah 0042 2] Reserved : 0000 +[02Ch 0044 4] Length : 00000028 +[030h 0048 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[032h 0050 2] Reserved1 : 0000 +[034h 0052 4] Processor Proximity Domain : 00000000 +[038h 0056 4] Memory Proximity Domain : 00000000 +[03Ch 0060 4] Reserved2 : 00000000 +[040h 0064 8] Reserved3 : 0000000000000000 +[048h 0072 8] Reserved4 : 0000000000000000 + +[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[052h 0082 2] Reserved : 0000 +[054h 0084 4] Length : 00000028 +[058h 0088 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[05Ah 0090 2] Reserved1 : 0000 +[05Ch 0092 4] Processor Proximity Domain : 00000000 +[060h 0096 4] Memory Proximity Domain : 00000001 +[064h 0100 4] Reserved2 : 00000000 +[068h 0104 8] Reserved3 : 0000000000000000 +[070h 0112 8] Reserved4 : 0000000000000000 + +[078h 0120 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[07Ah 0122 2] Reserved : 0000 +[07Ch 0124 4] Length : 00000030 +[080h 0128 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[081h 0129 1] Data Type : 00 +[082h 0130 2] Reserved1 : 0000 +[084h 0132 4] Initiator Proximity Domains # : 00000001 +[088h 0136 4] Target Proximity Domains # : 00000002 +[08Ch 0140 4] Reserved2 : 00000000 +[090h 0144 8] Entry Base Unit : 00000000000003E8 +[098h 0152 4] Initiator Proximity Domain List : 00000000 +[09Ch 0156 4] Target Proximity Domain List : 00000000 +[0A0h 0160 4] Target Proximity Domain List : 00000001 +[0A4h 0164 2] Entry : 0001 +[0A6h 0166 2] Entry : FFFE + +[0A8h 0168 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[0AAh 0170 2] Reserved : 0000 +[0ACh 0172 4] Length : 00000030 +[0B0h 0176 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[0B1h 0177 1] Data Type : 03 +[0B2h 0178 2] Reserved1 : 0000 +[0B4h 0180 4] Initiator Proximity Domains # : 00000001 +[0B8h 0184 4] Target Proximity Domains # : 00000002 +[0BCh 0188 4] Reserved2 : 00000000 +[0C0h 0192 8] Entry Base Unit : 0000000000000001 +[0C8h 0200 4] Initiator Proximity Domain List : 00000000 +[0CCh 0204 4] Target Proximity Domain List : 00000000 +[0D0h 0208 4] Target Proximity Domain List : 00000001 +[0D4h 0212 2] Entry : FFFE +[0D6h 0214 2] Entry : 7FFF + +[0D8h 0216 2] Structure Type : 0002 [Memory Side Cache Information] +[0DAh 0218 2] Reserved : 0000 +[0DCh 0220 4] Length : 00000020 +[0E0h 0224 4] Memory Proximity Domain : 00000000 +[0E4h 0228 4] Reserved1 : 00000000 +[0E8h 0232 8] Memory Side Cache Size : 0000000000002800 +[0F0h 0240 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[0F4h 0244 2] Reserved2 : 0000 +[0F6h 0246 2] SMBIOS Handle # : 0000 + +[0F8h 0248 2] Structure Type : 0002 [Memory Side Cache Information] +[0FAh 0250 2] Reserved : 0000 +[0FCh 0252 4] Length : 00000020 +[100h 0256 4] Memory Proximity Domain : 00000001 +[104h 0260 4] Reserved1 : 00000000 +[108h 0264 8] Memory Side Cache Size : 0000000000002800 +[110h 0272 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[114h 0276 2] Reserved2 : 0000 +[116h 0278 2] SMBIOS Handle # : 0000 + +Raw Table Data: Length 280 (0x118) + + 0000: 48 4D 41 54 18 01 00 00 02 98 42 4F 43 48 53 20 // HMAT......BOCHS + 0010: 42 58 50 43 48 4D 41 54 01 00 00 00 42 58 50 43 // BXPCHMAT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... + 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 28 00 00 00 01 00 00 00 00 00 00 00 // ....(........... + 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 00 00 00 30 00 00 00 // ............0... + 0080: 00 00 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 0090: E8 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 00 00 00 01 00 FE FF 01 00 00 00 30 00 00 00 // ............0... + 00B0: 00 03 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 00C0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 01 00 00 00 FE FF FF 7F 02 00 00 00 20 00 00 00 // ............ ... + 00E0: 00 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 00F0: 11 11 08 00 00 00 00 00 02 00 00 00 20 00 00 00 // ............ ... + 0100: 01 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 0110: 11 11 08 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HMAT.dsl b/tests/data/acpi/pc/HMAT.dsl new file mode 100644 index 0000000000..8031f62433 --- /dev/null +++ b/tests/data/acpi/pc/HMAT.dsl @@ -0,0 +1,132 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HMAT.acpihmat, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [HMAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HMAT" [Heterogeneous Memory Attributes Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 02 +[009h 0009 1] Checksum : 98 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHMAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[02Ah 0042 2] Reserved : 0000 +[02Ch 0044 4] Length : 00000028 +[030h 0048 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[032h 0050 2] Reserved1 : 0000 +[034h 0052 4] Processor Proximity Domain : 00000000 +[038h 0056 4] Memory Proximity Domain : 00000000 +[03Ch 0060 4] Reserved2 : 00000000 +[040h 0064 8] Reserved3 : 0000000000000000 +[048h 0072 8] Reserved4 : 0000000000000000 + +[050h 0080 2] Structure Type : 0000 [Memory Proximity Domain Attributes] +[052h 0082 2] Reserved : 0000 +[054h 0084 4] Length : 00000028 +[058h 0088 2] Flags (decoded below) : 0001 + Processor Proximity Domain Valid : 1 +[05Ah 0090 2] Reserved1 : 0000 +[05Ch 0092 4] Processor Proximity Domain : 00000000 +[060h 0096 4] Memory Proximity Domain : 00000001 +[064h 0100 4] Reserved2 : 00000000 +[068h 0104 8] Reserved3 : 0000000000000000 +[070h 0112 8] Reserved4 : 0000000000000000 + +[078h 0120 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[07Ah 0122 2] Reserved : 0000 +[07Ch 0124 4] Length : 00000030 +[080h 0128 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[081h 0129 1] Data Type : 00 +[082h 0130 2] Reserved1 : 0000 +[084h 0132 4] Initiator Proximity Domains # : 00000001 +[088h 0136 4] Target Proximity Domains # : 00000002 +[08Ch 0140 4] Reserved2 : 00000000 +[090h 0144 8] Entry Base Unit : 00000000000003E8 +[098h 0152 4] Initiator Proximity Domain List : 00000000 +[09Ch 0156 4] Target Proximity Domain List : 00000000 +[0A0h 0160 4] Target Proximity Domain List : 00000001 +[0A4h 0164 2] Entry : 0001 +[0A6h 0166 2] Entry : FFFE + +[0A8h 0168 2] Structure Type : 0001 [System Locality Latency and Bandwidth Information] +[0AAh 0170 2] Reserved : 0000 +[0ACh 0172 4] Length : 00000030 +[0B0h 0176 1] Flags (decoded below) : 00 + Memory Hierarchy : 0 +[0B1h 0177 1] Data Type : 03 +[0B2h 0178 2] Reserved1 : 0000 +[0B4h 0180 4] Initiator Proximity Domains # : 00000001 +[0B8h 0184 4] Target Proximity Domains # : 00000002 +[0BCh 0188 4] Reserved2 : 00000000 +[0C0h 0192 8] Entry Base Unit : 0000000000000001 +[0C8h 0200 4] Initiator Proximity Domain List : 00000000 +[0CCh 0204 4] Target Proximity Domain List : 00000000 +[0D0h 0208 4] Target Proximity Domain List : 00000001 +[0D4h 0212 2] Entry : FFFE +[0D6h 0214 2] Entry : 7FFF + +[0D8h 0216 2] Structure Type : 0002 [Memory Side Cache Information] +[0DAh 0218 2] Reserved : 0000 +[0DCh 0220 4] Length : 00000020 +[0E0h 0224 4] Memory Proximity Domain : 00000000 +[0E4h 0228 4] Reserved1 : 00000000 +[0E8h 0232 8] Memory Side Cache Size : 0000000000002800 +[0F0h 0240 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[0F4h 0244 2] Reserved2 : 0000 +[0F6h 0246 2] SMBIOS Handle # : 0000 + +[0F8h 0248 2] Structure Type : 0002 [Memory Side Cache Information] +[0FAh 0250 2] Reserved : 0000 +[0FCh 0252 4] Length : 00000020 +[100h 0256 4] Memory Proximity Domain : 00000001 +[104h 0260 4] Reserved1 : 00000000 +[108h 0264 8] Memory Side Cache Size : 0000000000002800 +[110h 0272 4] Cache Attributes (decoded below) : 00081111 + Total Cache Levels : 1 + Cache Level : 1 + Cache Associativity : 1 + Write Policy : 1 + Cache Line Size : 0008 +[114h 0276 2] Reserved2 : 0000 +[116h 0278 2] SMBIOS Handle # : 0000 + +Raw Table Data: Length 280 (0x118) + + 0000: 48 4D 41 54 18 01 00 00 02 98 42 4F 43 48 53 20 // HMAT......BOCHS + 0010: 42 58 50 43 48 4D 41 54 01 00 00 00 42 58 50 43 // BXPCHMAT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 00 00 28 00 00 00 // ............(... + 0030: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 00 00 00 28 00 00 00 01 00 00 00 00 00 00 00 // ....(........... + 0060: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 00 00 00 30 00 00 00 // ............0... + 0080: 00 00 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 0090: E8 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 00 00 00 01 00 FE FF 01 00 00 00 30 00 00 00 // ............0... + 00B0: 00 03 00 00 01 00 00 00 02 00 00 00 00 00 00 00 // ................ + 00C0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 01 00 00 00 FE FF FF 7F 02 00 00 00 20 00 00 00 // ............ ... + 00E0: 00 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 00F0: 11 11 08 00 00 00 00 00 02 00 00 00 20 00 00 00 // ............ ... + 0100: 01 00 00 00 00 00 00 00 00 28 00 00 00 00 00 00 // .........(...... + 0110: 11 11 08 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.acpihmat b/tests/data/acpi/pc/HPET.acpihmat Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.acpihmat diff --git a/tests/data/acpi/pc/HPET.acpihmat.dsl b/tests/data/acpi/pc/HPET.acpihmat.dsl new file mode 100644 index 0000000000..9029afb2a2 --- /dev/null +++ b/tests/data/acpi/pc/HPET.acpihmat.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.bridge b/tests/data/acpi/pc/HPET.bridge Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.bridge diff --git a/tests/data/acpi/pc/HPET.bridge.dsl b/tests/data/acpi/pc/HPET.bridge.dsl new file mode 100644 index 0000000000..936616faa8 --- /dev/null +++ b/tests/data/acpi/pc/HPET.bridge.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.cphp b/tests/data/acpi/pc/HPET.cphp Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.cphp diff --git a/tests/data/acpi/pc/HPET.cphp.dsl b/tests/data/acpi/pc/HPET.cphp.dsl new file mode 100644 index 0000000000..e095a43ee7 --- /dev/null +++ b/tests/data/acpi/pc/HPET.cphp.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.dimmpxm b/tests/data/acpi/pc/HPET.dimmpxm Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.dimmpxm diff --git a/tests/data/acpi/pc/HPET.dimmpxm.dsl b/tests/data/acpi/pc/HPET.dimmpxm.dsl new file mode 100644 index 0000000000..84ce218492 --- /dev/null +++ b/tests/data/acpi/pc/HPET.dimmpxm.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.dsl b/tests/data/acpi/pc/HPET.dsl new file mode 100644 index 0000000000..b392de5c95 --- /dev/null +++ b/tests/data/acpi/pc/HPET.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.hpbridge b/tests/data/acpi/pc/HPET.hpbridge Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.hpbridge diff --git a/tests/data/acpi/pc/HPET.ipmikcs b/tests/data/acpi/pc/HPET.ipmikcs Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.ipmikcs diff --git a/tests/data/acpi/pc/HPET.ipmikcs.dsl b/tests/data/acpi/pc/HPET.ipmikcs.dsl new file mode 100644 index 0000000000..34d10927dc --- /dev/null +++ b/tests/data/acpi/pc/HPET.ipmikcs.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.memhp b/tests/data/acpi/pc/HPET.memhp Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.memhp diff --git a/tests/data/acpi/pc/HPET.memhp.dsl b/tests/data/acpi/pc/HPET.memhp.dsl new file mode 100644 index 0000000000..f9f62dd9c8 --- /dev/null +++ b/tests/data/acpi/pc/HPET.memhp.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.numamem b/tests/data/acpi/pc/HPET.numamem Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.numamem diff --git a/tests/data/acpi/pc/HPET.numamem.dsl b/tests/data/acpi/pc/HPET.numamem.dsl new file mode 100644 index 0000000000..1f51efad19 --- /dev/null +++ b/tests/data/acpi/pc/HPET.numamem.dsl @@ -0,0 +1,43 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/HPET.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [HPET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "HPET" [High Precision Event Timer table] +[004h 0004 4] Table Length : 00000038 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 03 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCHPET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Hardware Block ID : 8086A201 + +[028h 0040 12] Timer Block Register : [Generic Address Structure] +[028h 0040 1] Space ID : 00 [SystemMemory] +[029h 0041 1] Bit Width : 00 +[02Ah 0042 1] Bit Offset : 00 +[02Bh 0043 1] Encoded Access Width : 00 [Undefined/Legacy] +[02Ch 0044 8] Address : 00000000FED00000 + +[034h 0052 1] Sequence Number : 00 +[035h 0053 2] Minimum Clock Ticks : 0000 +[037h 0055 1] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 + +Raw Table Data: Length 56 (0x38) + + 0000: 48 50 45 54 38 00 00 00 01 03 42 4F 43 48 53 20 // HPET8.....BOCHS + 0010: 42 58 50 43 48 50 45 54 01 00 00 00 42 58 50 43 // BXPCHPET....BXPC + 0020: 01 00 00 00 01 A2 86 80 00 00 00 00 00 00 D0 FE // ................ + 0030: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/HPET.roothp b/tests/data/acpi/pc/HPET.roothp Binary files differnew file mode 100644 index 0000000000..df689b8f99 --- /dev/null +++ b/tests/data/acpi/pc/HPET.roothp diff --git a/tests/data/acpi/pc/NFIT.dimmpxm.dsl b/tests/data/acpi/pc/NFIT.dimmpxm.dsl new file mode 100644 index 0000000000..33212b0a17 --- /dev/null +++ b/tests/data/acpi/pc/NFIT.dimmpxm.dsl @@ -0,0 +1,115 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/NFIT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000F0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 24 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000002 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000108000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +[0E0h 0224 2] Subtable Type : 0007 [Platform Capabilities] +[0E2h 0226 2] Length : 0010 + +[0E4h 0228 1] Highest Capability : 01 +[0E5h 0229 3] Reserved : 000000 +[0E8h 0232 4] Capabilities (decoded below) : 00000003 + Cache Flush to NVDIMM : 1 + Memory Flush to NVDIMM : 1 + Memory Mirroring : 0 +[0ECh 0236 4] Reserved : 00000000 + +Raw Table Data: Length 240 (0xF0) + + 0000: 4E 46 49 54 F0 00 00 00 01 24 42 4F 43 48 53 20 // NFIT.....$BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 02 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 08 01 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 07 00 10 00 01 00 00 00 03 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/NFIT.dsl b/tests/data/acpi/pc/NFIT.dsl new file mode 100644 index 0000000000..f4a8034f87 --- /dev/null +++ b/tests/data/acpi/pc/NFIT.dsl @@ -0,0 +1,115 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/NFIT.dimmpxm, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [NFIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "NFIT" [NVDIMM Firmware Interface Table] +[004h 0004 4] Table Length : 000000F0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 24 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCNFIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Reserved : 00000000 + +[028h 0040 2] Subtable Type : 0000 [System Physical Address Range] +[02Ah 0042 2] Length : 0038 + +[02Ch 0044 2] Range Index : 0004 +[02Eh 0046 2] Flags (decoded below) : 0003 + Add/Online Operation Only : 1 + Proximity Domain Valid : 1 +[030h 0048 4] Reserved : 00000000 +[034h 0052 4] Proximity Domain : 00000002 +[038h 0056 16] Region Type GUID : 66F0D379-B4F3-4074-AC43-0D3318B78CDB +[048h 0072 8] Address Range Base : 0000000108000000 +[050h 0080 8] Address Range Length : 0000000008000000 +[058h 0088 8] Memory Map Attribute : 0000000000008008 + +[060h 0096 2] Subtable Type : 0001 [Memory Range Map] +[062h 0098 2] Length : 0030 + +[064h 0100 4] Device Handle : 00000002 +[068h 0104 2] Physical Id : 0000 +[06Ah 0106 2] Region Id : 0000 +[06Ch 0108 2] Range Index : 0004 +[06Eh 0110 2] Control Region Index : 0005 +[070h 0112 8] Region Size : 0000000008000000 +[078h 0120 8] Region Offset : 0000000000000000 +[080h 0128 8] Address Region Base : 0000000000000000 +[088h 0136 2] Interleave Index : 0000 +[08Ah 0138 2] Interleave Ways : 0001 +[08Ch 0140 2] Flags : 0000 + Save to device failed : 0 + Restore from device failed : 0 + Platform flush failed : 0 + Device not armed : 0 + Health events observed : 0 + Health events enabled : 0 + Mapping failed : 0 +[08Eh 0142 2] Reserved : 0000 + +[090h 0144 2] Subtable Type : 0004 [NVDIMM Control Region] +[092h 0146 2] Length : 0050 + +[094h 0148 2] Region Index : 0005 +[096h 0150 2] Vendor Id : 8086 +[098h 0152 2] Device Id : 0001 +[09Ah 0154 2] Revision Id : 0001 +[09Ch 0156 2] Subsystem Vendor Id : 0000 +[09Eh 0158 2] Subsystem Device Id : 0000 +[0A0h 0160 2] Subsystem Revision Id : 0000 +[0A2h 0162 1] Valid Fields : 00 +[0A3h 0163 1] Manufacturing Location : 00 +[0A4h 0164 2] Manufacturing Date : 0000 +[0A6h 0166 2] Reserved : 0000 +[0A8h 0168 4] Serial Number : 00123457 +[0ACh 0172 2] Code : 0301 +[0AEh 0174 2] Window Count : 0000 +[0B0h 0176 8] Window Size : 0000000000000000 +[0B8h 0184 8] Command Offset : 0000000000000000 +[0C0h 0192 8] Command Size : 0000000000000000 +[0C8h 0200 8] Status Offset : 0000000000000000 +[0D0h 0208 8] Status Size : 0000000000000000 +[0D8h 0216 2] Flags : 0000 + Windows buffered : 0 +[0DAh 0218 6] Reserved1 : 000000000000 + +[0E0h 0224 2] Subtable Type : 0007 [Platform Capabilities] +[0E2h 0226 2] Length : 0010 + +[0E4h 0228 1] Highest Capability : 01 +[0E5h 0229 3] Reserved : 000000 +[0E8h 0232 4] Capabilities (decoded below) : 00000003 + Cache Flush to NVDIMM : 1 + Memory Flush to NVDIMM : 1 + Memory Mirroring : 0 +[0ECh 0236 4] Reserved : 00000000 + +Raw Table Data: Length 240 (0xF0) + + 0000: 4E 46 49 54 F0 00 00 00 01 24 42 4F 43 48 53 20 // NFIT.....$BOCHS + 0010: 42 58 50 43 4E 46 49 54 01 00 00 00 42 58 50 43 // BXPCNFIT....BXPC + 0020: 01 00 00 00 00 00 00 00 00 00 38 00 04 00 03 00 // ..........8..... + 0030: 00 00 00 00 02 00 00 00 79 D3 F0 66 F3 B4 74 40 // ........y..f..t@ + 0040: AC 43 0D 33 18 B7 8C DB 00 00 00 08 01 00 00 00 // .C.3............ + 0050: 00 00 00 08 00 00 00 00 08 80 00 00 00 00 00 00 // ................ + 0060: 01 00 30 00 02 00 00 00 00 00 00 00 04 00 05 00 // ..0............. + 0070: 00 00 00 08 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 00 00 00 00 00 00 00 00 00 01 00 00 00 00 00 // ................ + 0090: 04 00 50 00 05 00 86 80 01 00 01 00 00 00 00 00 // ..P............. + 00A0: 00 00 00 00 00 00 00 00 57 34 12 00 01 03 00 00 // ........W4...... + 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 07 00 10 00 01 00 00 00 03 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SLIT.cphp.dsl b/tests/data/acpi/pc/SLIT.cphp.dsl new file mode 100644 index 0000000000..20289608db --- /dev/null +++ b/tests/data/acpi/pc/SLIT.cphp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SLIT.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/pc/SLIT.dsl b/tests/data/acpi/pc/SLIT.dsl new file mode 100644 index 0000000000..8b923249af --- /dev/null +++ b/tests/data/acpi/pc/SLIT.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SLIT.memhp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/pc/SLIT.memhp.dsl b/tests/data/acpi/pc/SLIT.memhp.dsl new file mode 100644 index 0000000000..b3a0170144 --- /dev/null +++ b/tests/data/acpi/pc/SLIT.memhp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SLIT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SLIT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SLIT" [System Locality Information Table] +[004h 0004 4] Table Length : 00000030 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 2C +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSLIT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 8] Localities : 0000000000000002 +[02Ch 0044 2] Locality 0 : 0A 15 +[02Eh 0046 2] Locality 1 : 15 0A + +Raw Table Data: Length 48 (0x30) + + 0000: 53 4C 49 54 30 00 00 00 01 2C 42 4F 43 48 53 20 // SLIT0....,BOCHS + 0010: 42 58 50 43 53 4C 49 54 01 00 00 00 42 58 50 43 // BXPCSLIT....BXPC + 0020: 01 00 00 00 02 00 00 00 00 00 00 00 0A 15 15 0A // ................ diff --git a/tests/data/acpi/pc/SRAT.acpihmat.dsl b/tests/data/acpi/pc/SRAT.acpihmat.dsl new file mode 100644 index 0000000000..e3c788672f --- /dev/null +++ b/tests/data/acpi/pc/SRAT.acpihmat.dsl @@ -0,0 +1,137 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000118 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : C0 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 00 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 01 [Memory Affinity] +[051h 0081 1] Length : 28 + +[052h 0082 4] Proximity Domain : 00000000 +[056h 0086 2] Reserved1 : 0000 +[058h 0088 8] Base Address : 0000000000000000 +[060h 0096 8] Address Length : 00000000000A0000 +[068h 0104 4] Reserved2 : 00000000 +[06Ch 0108 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[070h 0112 8] Reserved3 : 0000000000000000 + +[078h 0120 1] Subtable Type : 01 [Memory Affinity] +[079h 0121 1] Length : 28 + +[07Ah 0122 4] Proximity Domain : 00000000 +[07Eh 0126 2] Reserved1 : 0000 +[080h 0128 8] Base Address : 0000000000100000 +[088h 0136 8] Address Length : 0000000003F00000 +[090h 0144 4] Reserved2 : 00000000 +[094h 0148 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[098h 0152 8] Reserved3 : 0000000000000000 + +[0A0h 0160 1] Subtable Type : 01 [Memory Affinity] +[0A1h 0161 1] Length : 28 + +[0A2h 0162 4] Proximity Domain : 00000001 +[0A6h 0166 2] Reserved1 : 0000 +[0A8h 0168 8] Base Address : 0000000004000000 +[0B0h 0176 8] Address Length : 0000000004000000 +[0B8h 0184 4] Reserved2 : 00000000 +[0BCh 0188 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0C0h 0192 8] Reserved3 : 0000000000000000 + +[0C8h 0200 1] Subtable Type : 01 [Memory Affinity] +[0C9h 0201 1] Length : 28 + +[0CAh 0202 4] Proximity Domain : 00000000 +[0CEh 0206 2] Reserved1 : 0000 +[0D0h 0208 8] Base Address : 0000000000000000 +[0D8h 0216 8] Address Length : 0000000000000000 +[0E0h 0224 4] Reserved2 : 00000000 +[0E4h 0228 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0E8h 0232 8] Reserved3 : 0000000000000000 + +[0F0h 0240 1] Subtable Type : 01 [Memory Affinity] +[0F1h 0241 1] Length : 28 + +[0F2h 0242 4] Proximity Domain : 00000001 +[0F6h 0246 2] Reserved1 : 0000 +[0F8h 0248 8] Base Address : 0000000100000000 +[100h 0256 8] Address Length : 00000000B8000000 +[108h 0264 4] Reserved2 : 00000000 +[10Ch 0268 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[110h 0272 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 280 (0x118) + + 0000: 53 52 41 54 18 01 00 00 01 C0 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 00 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0060: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0070: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0080: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 0090: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00A0: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00B0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00C0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00F0: 01 28 01 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 0100: 00 00 00 B8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0110: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/SRAT.cphp.dsl b/tests/data/acpi/pc/SRAT.cphp.dsl new file mode 100644 index 0000000000..20c38ee3cc --- /dev/null +++ b/tests/data/acpi/pc/SRAT.cphp.dsl @@ -0,0 +1,168 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000130 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 36 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 00 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[051h 0081 1] Length : 10 + +[052h 0082 1] Proximity Domain Low(8) : 00 +[053h 0083 1] Apic ID : 02 +[054h 0084 4] Flags (decoded below) : 00000001 + Enabled : 1 +[058h 0088 1] Local Sapic EID : 00 +[059h 0089 3] Proximity Domain High(24) : 000000 +[05Ch 0092 4] Clock Domain : 00000000 + +[060h 0096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[061h 0097 1] Length : 10 + +[062h 0098 1] Proximity Domain Low(8) : 01 +[063h 0099 1] Apic ID : 04 +[064h 0100 4] Flags (decoded below) : 00000001 + Enabled : 1 +[068h 0104 1] Local Sapic EID : 00 +[069h 0105 3] Proximity Domain High(24) : 000000 +[06Ch 0108 4] Clock Domain : 00000000 + +[070h 0112 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[071h 0113 1] Length : 10 + +[072h 0114 1] Proximity Domain Low(8) : 01 +[073h 0115 1] Apic ID : 05 +[074h 0116 4] Flags (decoded below) : 00000001 + Enabled : 1 +[078h 0120 1] Local Sapic EID : 00 +[079h 0121 3] Proximity Domain High(24) : 000000 +[07Ch 0124 4] Clock Domain : 00000000 + +[080h 0128 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[081h 0129 1] Length : 10 + +[082h 0130 1] Proximity Domain Low(8) : 01 +[083h 0131 1] Apic ID : 06 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 +[088h 0136 1] Local Sapic EID : 00 +[089h 0137 3] Proximity Domain High(24) : 000000 +[08Ch 0140 4] Clock Domain : 00000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 00000000000A0000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000100000 +[0C8h 0200 8] Address Length : 0000000003F00000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +[0E0h 0224 1] Subtable Type : 01 [Memory Affinity] +[0E1h 0225 1] Length : 28 + +[0E2h 0226 4] Proximity Domain : 00000001 +[0E6h 0230 2] Reserved1 : 0000 +[0E8h 0232 8] Base Address : 0000000004000000 +[0F0h 0240 8] Address Length : 0000000004000000 +[0F8h 0248 4] Reserved2 : 00000000 +[0FCh 0252 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[100h 0256 8] Reserved3 : 0000000000000000 + +[108h 0264 1] Subtable Type : 01 [Memory Affinity] +[109h 0265 1] Length : 28 + +[10Ah 0266 4] Proximity Domain : 00000000 +[10Eh 0270 2] Reserved1 : 0000 +[110h 0272 8] Base Address : 0000000000000000 +[118h 0280 8] Address Length : 0000000000000000 +[120h 0288 4] Reserved2 : 00000000 +[124h 0292 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[128h 0296 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 304 (0x130) + + 0000: 53 52 41 54 30 01 00 00 01 36 42 4F 43 48 53 20 // SRAT0....6BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 00 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 10 00 02 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 10 01 04 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 00 10 01 05 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0080: 00 10 01 06 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 00D0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00F0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SRAT.dimmpxm.dsl b/tests/data/acpi/pc/SRAT.dimmpxm.dsl new file mode 100644 index 0000000000..888fef1b5c --- /dev/null +++ b/tests/data/acpi/pc/SRAT.dimmpxm.dsl @@ -0,0 +1,194 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000188 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 68 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[041h 0065 1] Length : 10 + +[042h 0066 1] Proximity Domain Low(8) : 01 +[043h 0067 1] Apic ID : 01 +[044h 0068 4] Flags (decoded below) : 00000001 + Enabled : 1 +[048h 0072 1] Local Sapic EID : 00 +[049h 0073 3] Proximity Domain High(24) : 000000 +[04Ch 0076 4] Clock Domain : 00000000 + +[050h 0080 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[051h 0081 1] Length : 10 + +[052h 0082 1] Proximity Domain Low(8) : 02 +[053h 0083 1] Apic ID : 02 +[054h 0084 4] Flags (decoded below) : 00000001 + Enabled : 1 +[058h 0088 1] Local Sapic EID : 00 +[059h 0089 3] Proximity Domain High(24) : 000000 +[05Ch 0092 4] Clock Domain : 00000000 + +[060h 0096 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[061h 0097 1] Length : 10 + +[062h 0098 1] Proximity Domain Low(8) : 03 +[063h 0099 1] Apic ID : 03 +[064h 0100 4] Flags (decoded below) : 00000001 + Enabled : 1 +[068h 0104 1] Local Sapic EID : 00 +[069h 0105 3] Proximity Domain High(24) : 000000 +[06Ch 0108 4] Clock Domain : 00000000 + +[070h 0112 1] Subtable Type : 01 [Memory Affinity] +[071h 0113 1] Length : 28 + +[072h 0114 4] Proximity Domain : 00000000 +[076h 0118 2] Reserved1 : 0000 +[078h 0120 8] Base Address : 0000000000000000 +[080h 0128 8] Address Length : 00000000000A0000 +[088h 0136 4] Reserved2 : 00000000 +[08Ch 0140 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[090h 0144 8] Reserved3 : 0000000000000000 + +[098h 0152 1] Subtable Type : 01 [Memory Affinity] +[099h 0153 1] Length : 28 + +[09Ah 0154 4] Proximity Domain : 00000000 +[09Eh 0158 2] Reserved1 : 0000 +[0A0h 0160 8] Base Address : 0000000000100000 +[0A8h 0168 8] Address Length : 0000000001F00000 +[0B0h 0176 4] Reserved2 : 00000000 +[0B4h 0180 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B8h 0184 8] Reserved3 : 0000000000000000 + +[0C0h 0192 1] Subtable Type : 01 [Memory Affinity] +[0C1h 0193 1] Length : 28 + +[0C2h 0194 4] Proximity Domain : 00000001 +[0C6h 0198 2] Reserved1 : 0000 +[0C8h 0200 8] Base Address : 0000000002000000 +[0D0h 0208 8] Address Length : 0000000002000000 +[0D8h 0216 4] Reserved2 : 00000000 +[0DCh 0220 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0E0h 0224 8] Reserved3 : 0000000000000000 + +[0E8h 0232 1] Subtable Type : 01 [Memory Affinity] +[0E9h 0233 1] Length : 28 + +[0EAh 0234 4] Proximity Domain : 00000002 +[0EEh 0238 2] Reserved1 : 0000 +[0F0h 0240 8] Base Address : 0000000004000000 +[0F8h 0248 8] Address Length : 0000000002000000 +[100h 0256 4] Reserved2 : 00000000 +[104h 0260 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[108h 0264 8] Reserved3 : 0000000000000000 + +[110h 0272 1] Subtable Type : 01 [Memory Affinity] +[111h 0273 1] Length : 28 + +[112h 0274 4] Proximity Domain : 00000003 +[116h 0278 2] Reserved1 : 0000 +[118h 0280 8] Base Address : 0000000006000000 +[120h 0288 8] Address Length : 0000000002000000 +[128h 0296 4] Reserved2 : 00000000 +[12Ch 0300 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[130h 0304 8] Reserved3 : 0000000000000000 + +[138h 0312 1] Subtable Type : 01 [Memory Affinity] +[139h 0313 1] Length : 28 + +[13Ah 0314 4] Proximity Domain : 00000002 +[13Eh 0318 2] Reserved1 : 0000 +[140h 0320 8] Base Address : 0000000108000000 +[148h 0328 8] Address Length : 0000000008000000 +[150h 0336 4] Reserved2 : 00000000 +[154h 0340 4] Flags (decoded below) : 00000005 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 1 +[158h 0344 8] Reserved3 : 0000000000000000 + +[160h 0352 1] Subtable Type : 01 [Memory Affinity] +[161h 0353 1] Length : 28 + +[162h 0354 4] Proximity Domain : 00000003 +[166h 0358 2] Reserved1 : 0000 +[168h 0360 8] Base Address : 0000000100000000 +[170h 0368 8] Address Length : 00000000F8000000 +[178h 0376 4] Reserved2 : 00000000 +[17Ch 0380 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[180h 0384 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 392 (0x188) + + 0000: 53 52 41 54 88 01 00 00 01 68 42 4F 43 48 53 20 // SRAT.....hBOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 00 10 01 01 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0050: 00 10 02 02 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0060: 00 10 03 03 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0070: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0080: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0090: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00A0: 00 00 10 00 00 00 00 00 00 00 F0 01 00 00 00 00 // ................ + 00B0: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00C0: 01 28 01 00 00 00 00 00 00 00 00 02 00 00 00 00 // .(.............. + 00D0: 00 00 00 02 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00E0: 00 00 00 00 00 00 00 00 01 28 02 00 00 00 00 00 // .........(...... + 00F0: 00 00 00 04 00 00 00 00 00 00 00 02 00 00 00 00 // ................ + 0100: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0110: 01 28 03 00 00 00 00 00 00 00 00 06 00 00 00 00 // .(.............. + 0120: 00 00 00 02 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0130: 00 00 00 00 00 00 00 00 01 28 02 00 00 00 00 00 // .........(...... + 0140: 00 00 00 08 01 00 00 00 00 00 00 08 00 00 00 00 // ................ + 0150: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0160: 01 28 03 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 0170: 00 00 00 F8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0180: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/SRAT.dsl b/tests/data/acpi/pc/SRAT.dsl new file mode 100644 index 0000000000..77bbfebc81 --- /dev/null +++ b/tests/data/acpi/pc/SRAT.dsl @@ -0,0 +1,108 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.numamem, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : F5 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000001 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000001 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000007F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 0000000000000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 53 52 41 54 E0 00 00 00 01 F5 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 01 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 07 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SRAT.memhp.dsl b/tests/data/acpi/pc/SRAT.memhp.dsl new file mode 100644 index 0000000000..803f9c8f1a --- /dev/null +++ b/tests/data/acpi/pc/SRAT.memhp.dsl @@ -0,0 +1,125 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 00000108 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : A2 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000000 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000000 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000003F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000001 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000004000000 +[0A0h 0160 8] Address Length : 0000000004000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +[0E0h 0224 1] Subtable Type : 01 [Memory Affinity] +[0E1h 0225 1] Length : 28 + +[0E2h 0226 4] Proximity Domain : 00000001 +[0E6h 0230 2] Reserved1 : 0000 +[0E8h 0232 8] Base Address : 0000000100000000 +[0F0h 0240 8] Address Length : 00000000F8000000 +[0F8h 0248 4] Reserved2 : 00000000 +[0FCh 0252 4] Flags (decoded below) : 00000003 + Enabled : 1 + Hot Pluggable : 1 + Non-Volatile : 0 +[100h 0256 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 264 (0x108) + + 0000: 53 52 41 54 08 01 00 00 01 A2 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 03 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 01 00 00 00 00 00 00 00 00 04 00 00 00 00 // .(.............. + 00A0: 00 00 00 04 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00E0: 01 28 01 00 00 00 00 00 00 00 00 00 01 00 00 00 // .(.............. + 00F0: 00 00 00 F8 00 00 00 00 00 00 00 00 03 00 00 00 // ................ + 0100: 00 00 00 00 00 00 00 00 // ........ diff --git a/tests/data/acpi/pc/SRAT.numamem.dsl b/tests/data/acpi/pc/SRAT.numamem.dsl new file mode 100644 index 0000000000..74f4382dd1 --- /dev/null +++ b/tests/data/acpi/pc/SRAT.numamem.dsl @@ -0,0 +1,108 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/SRAT.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [SRAT] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "SRAT" [System Resource Affinity Table] +[004h 0004 4] Table Length : 000000E0 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : F5 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCSRAT" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Table Revision : 00000001 +[028h 0040 8] Reserved : 0000000000000000 + +[030h 0048 1] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[031h 0049 1] Length : 10 + +[032h 0050 1] Proximity Domain Low(8) : 00 +[033h 0051 1] Apic ID : 00 +[034h 0052 4] Flags (decoded below) : 00000001 + Enabled : 1 +[038h 0056 1] Local Sapic EID : 00 +[039h 0057 3] Proximity Domain High(24) : 000000 +[03Ch 0060 4] Clock Domain : 00000000 + +[040h 0064 1] Subtable Type : 01 [Memory Affinity] +[041h 0065 1] Length : 28 + +[042h 0066 4] Proximity Domain : 00000001 +[046h 0070 2] Reserved1 : 0000 +[048h 0072 8] Base Address : 0000000000000000 +[050h 0080 8] Address Length : 00000000000A0000 +[058h 0088 4] Reserved2 : 00000000 +[05Ch 0092 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[060h 0096 8] Reserved3 : 0000000000000000 + +[068h 0104 1] Subtable Type : 01 [Memory Affinity] +[069h 0105 1] Length : 28 + +[06Ah 0106 4] Proximity Domain : 00000001 +[06Eh 0110 2] Reserved1 : 0000 +[070h 0112 8] Base Address : 0000000000100000 +[078h 0120 8] Address Length : 0000000007F00000 +[080h 0128 4] Reserved2 : 00000000 +[084h 0132 4] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[088h 0136 8] Reserved3 : 0000000000000000 + +[090h 0144 1] Subtable Type : 01 [Memory Affinity] +[091h 0145 1] Length : 28 + +[092h 0146 4] Proximity Domain : 00000000 +[096h 0150 2] Reserved1 : 0000 +[098h 0152 8] Base Address : 0000000000000000 +[0A0h 0160 8] Address Length : 0000000000000000 +[0A8h 0168 4] Reserved2 : 00000000 +[0ACh 0172 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0B0h 0176 8] Reserved3 : 0000000000000000 + +[0B8h 0184 1] Subtable Type : 01 [Memory Affinity] +[0B9h 0185 1] Length : 28 + +[0BAh 0186 4] Proximity Domain : 00000000 +[0BEh 0190 2] Reserved1 : 0000 +[0C0h 0192 8] Base Address : 0000000000000000 +[0C8h 0200 8] Address Length : 0000000000000000 +[0D0h 0208 4] Reserved2 : 00000000 +[0D4h 0212 4] Flags (decoded below) : 00000000 + Enabled : 0 + Hot Pluggable : 0 + Non-Volatile : 0 +[0D8h 0216 8] Reserved3 : 0000000000000000 + +Raw Table Data: Length 224 (0xE0) + + 0000: 53 52 41 54 E0 00 00 00 01 F5 42 4F 43 48 53 20 // SRAT......BOCHS + 0010: 42 58 50 43 53 52 41 54 01 00 00 00 42 58 50 43 // BXPCSRAT....BXPC + 0020: 01 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0030: 00 10 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0040: 01 28 01 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 0050: 00 00 0A 00 00 00 00 00 00 00 00 00 01 00 00 00 // ................ + 0060: 00 00 00 00 00 00 00 00 01 28 01 00 00 00 00 00 // .........(...... + 0070: 00 00 10 00 00 00 00 00 00 00 F0 07 00 00 00 00 // ................ + 0080: 00 00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 // ................ + 0090: 01 28 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // .(.............. + 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00B0: 00 00 00 00 00 00 00 00 01 28 00 00 00 00 00 00 // .........(...... + 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ + 00D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 // ................ diff --git a/tests/data/acpi/pc/SSDT.dsl b/tests/data/acpi/pc/SSDT.dsl new file mode 100644 index 0000000000..abd64f6133 --- /dev/null +++ b/tests/data/acpi/pc/SSDT.dsl @@ -0,0 +1,205 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembling to symbolic ASL+ operators + * + * Disassembly of tests/data/acpi/pc/SSDT.dimmpxm, Mon Sep 28 17:24:38 2020 + * + * Original Table Header: + * Signature "SSDT" + * Length 0x000002DE (734) + * Revision 0x01 + * Checksum 0x56 + * OEM ID "BOCHS " + * OEM Table ID "NVDIMM" + * OEM Revision 0x00000001 (1) + * Compiler ID "BXPC" + * Compiler Version 0x00000001 (1) + */ +DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001) +{ + Scope (\_SB) + { + Device (NVDR) + { + Name (_HID, "ACPI0012" /* NVDIMM Root Device */) // _HID: Hardware ID + Method (NCAL, 5, Serialized) + { + Local6 = MEMA /* \MEMA */ + OperationRegion (NPIO, SystemIO, 0x0A18, 0x04) + OperationRegion (NRAM, SystemMemory, Local6, 0x1000) + Field (NPIO, DWordAcc, NoLock, Preserve) + { + NTFI, 32 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + HDLE, 32, + REVS, 32, + FUNC, 32, + FARG, 32672 + } + + Field (NRAM, DWordAcc, NoLock, Preserve) + { + RLEN, 32, + ODAT, 32736 + } + + If ((Arg4 == Zero)) + { + Local0 = ToUUID ("2f10e7a4-9e91-11e4-89d3-123b93f75cba") + } + ElseIf ((Arg4 == 0x00010000)) + { + Local0 = ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62") + } + Else + { + Local0 = ToUUID ("4309ac30-0d11-11e4-9191-0800200c9a66") + } + + If (((Local6 == Zero) | (Arg0 != Local0))) + { + If ((Arg2 == Zero)) + { + Return (Buffer (One) + { + 0x00 // . + }) + } + + Return (Buffer (One) + { + 0x01 // . + }) + } + + HDLE = Arg4 + REVS = Arg1 + FUNC = Arg2 + If (((ObjectType (Arg3) == 0x04) & (SizeOf (Arg3) == One))) + { + Local2 = Arg3 [Zero] + Local3 = DerefOf (Local2) + FARG = Local3 + } + + NTFI = Local6 + Local1 = (RLEN - 0x04) + If ((Local1 < 0x08)) + { + Local2 = Zero + Name (TBUF, Buffer (One) + { + 0x00 // . + }) + Local7 = Buffer (Zero){} + While ((Local2 < Local1)) + { + TBUF [Zero] = DerefOf (ODAT [Local2]) + Concatenate (Local7, TBUF, Local7) + Local2++ + } + + Return (Local7) + } + + Local1 = (Local1 << 0x03) + CreateField (ODAT, Zero, Local1, OBUF) + Return (OBUF) /* \_SB_.NVDR.NCAL.OBUF */ + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, Zero)) + } + + Name (RSTA, Zero) + Method (RFIT, 1, Serialized) + { + Name (OFST, Zero) + OFST = Arg0 + Local0 = NCAL (ToUUID ("648b9cf2-cda1-4312-8ad9-49c4af32bd62"), One, One, Package (0x01) + { + OFST + }, 0x00010000) + CreateDWordField (Local0, Zero, STAU) + RSTA = STAU /* \_SB_.NVDR.RFIT.STAU */ + If ((Zero != STAU)) + { + Return (Buffer (Zero){}) + } + + Local1 = SizeOf (Local0) + Local1 -= 0x04 + If ((Local1 == Zero)) + { + Return (Buffer (Zero){}) + } + + CreateField (Local0, 0x20, (Local1 << 0x03), BUFF) + Return (BUFF) /* \_SB_.NVDR.RFIT.BUFF */ + } + + Method (_FIT, 0, Serialized) // _FIT: Firmware Interface Table + { + Local2 = Buffer (Zero){} + Local3 = Zero + While (One) + { + Local0 = RFIT (Local3) + Local1 = SizeOf (Local0) + If ((RSTA == 0x0100)) + { + Local2 = Buffer (Zero){} + Local3 = Zero + } + Else + { + If ((Local1 == Zero)) + { + Return (Local2) + } + + Local3 += Local1 + Concatenate (Local2, Local0, Local2) + } + } + } + + Device (NV00) + { + Name (_ADR, One) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, One)) + } + } + + Device (NV01) + { + Name (_ADR, 0x02) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x02)) + } + } + + Device (NV02) + { + Name (_ADR, 0x03) // _ADR: Address + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + Return (NCAL (Arg0, Arg1, Arg2, Arg3, 0x03)) + } + } + } + } + + Name (MEMA, 0x07FFE000) +} + diff --git a/tests/data/acpi/pc/WAET.acpihmat b/tests/data/acpi/pc/WAET.acpihmat Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.acpihmat diff --git a/tests/data/acpi/pc/WAET.acpihmat.dsl b/tests/data/acpi/pc/WAET.acpihmat.dsl new file mode 100644 index 0000000000..991c8773b8 --- /dev/null +++ b/tests/data/acpi/pc/WAET.acpihmat.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.acpihmat, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.bridge b/tests/data/acpi/pc/WAET.bridge Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.bridge diff --git a/tests/data/acpi/pc/WAET.bridge.dsl b/tests/data/acpi/pc/WAET.bridge.dsl new file mode 100644 index 0000000000..f47dbb17a7 --- /dev/null +++ b/tests/data/acpi/pc/WAET.bridge.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.bridge, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.cphp b/tests/data/acpi/pc/WAET.cphp Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.cphp diff --git a/tests/data/acpi/pc/WAET.cphp.dsl b/tests/data/acpi/pc/WAET.cphp.dsl new file mode 100644 index 0000000000..ff077a14eb --- /dev/null +++ b/tests/data/acpi/pc/WAET.cphp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.cphp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.dimmpxm b/tests/data/acpi/pc/WAET.dimmpxm Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.dimmpxm diff --git a/tests/data/acpi/pc/WAET.dimmpxm.dsl b/tests/data/acpi/pc/WAET.dimmpxm.dsl new file mode 100644 index 0000000000..b8192c8601 --- /dev/null +++ b/tests/data/acpi/pc/WAET.dimmpxm.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.dimmpxm, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.dsl b/tests/data/acpi/pc/WAET.dsl new file mode 100644 index 0000000000..53b6c1dc42 --- /dev/null +++ b/tests/data/acpi/pc/WAET.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.roothp, Mon Sep 28 17:24:38 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.hpbridge b/tests/data/acpi/pc/WAET.hpbridge Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.hpbridge diff --git a/tests/data/acpi/pc/WAET.ipmikcs b/tests/data/acpi/pc/WAET.ipmikcs Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.ipmikcs diff --git a/tests/data/acpi/pc/WAET.ipmikcs.dsl b/tests/data/acpi/pc/WAET.ipmikcs.dsl new file mode 100644 index 0000000000..5144bada0f --- /dev/null +++ b/tests/data/acpi/pc/WAET.ipmikcs.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.ipmikcs, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.memhp b/tests/data/acpi/pc/WAET.memhp Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.memhp diff --git a/tests/data/acpi/pc/WAET.memhp.dsl b/tests/data/acpi/pc/WAET.memhp.dsl new file mode 100644 index 0000000000..bfe3a036d7 --- /dev/null +++ b/tests/data/acpi/pc/WAET.memhp.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.memhp, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.numamem b/tests/data/acpi/pc/WAET.numamem Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.numamem diff --git a/tests/data/acpi/pc/WAET.numamem.dsl b/tests/data/acpi/pc/WAET.numamem.dsl new file mode 100644 index 0000000000..e4c6cf4bf8 --- /dev/null +++ b/tests/data/acpi/pc/WAET.numamem.dsl @@ -0,0 +1,31 @@ +/* + * Intel ACPI Component Architecture + * AML/ASL+ Disassembler version 20190509 (64-bit version) + * Copyright (c) 2000 - 2019 Intel Corporation + * + * Disassembly of tests/data/acpi/pc/WAET.numamem, Tue Aug 4 11:14:15 2020 + * + * ACPI Data Table [WAET] + * + * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue + */ + +[000h 0000 4] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[004h 0004 4] Table Length : 00000028 +[008h 0008 1] Revision : 01 +[009h 0009 1] Checksum : 88 +[00Ah 0010 6] Oem ID : "BOCHS " +[010h 0016 8] Oem Table ID : "BXPCWAET" +[018h 0024 4] Oem Revision : 00000001 +[01Ch 0028 4] Asl Compiler ID : "BXPC" +[020h 0032 4] Asl Compiler Revision : 00000001 + +[024h 0036 4] Flags (decoded below) : 00000002 + RTC needs no INT ack : 0 + PM timer, one read only : 1 + +Raw Table Data: Length 40 (0x28) + + 0000: 57 41 45 54 28 00 00 00 01 88 42 4F 43 48 53 20 // WAET(.....BOCHS + 0010: 42 58 50 43 57 41 45 54 01 00 00 00 42 58 50 43 // BXPCWAET....BXPC + 0020: 01 00 00 00 02 00 00 00 // ........ diff --git a/tests/data/acpi/pc/WAET.roothp b/tests/data/acpi/pc/WAET.roothp Binary files differnew file mode 100644 index 0000000000..c2240f58df --- /dev/null +++ b/tests/data/acpi/pc/WAET.roothp |