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| author | Mikhail Tyutin <m.tyutin@yadro.com> | 2023-03-10 21:58:45 +0300 |
|---|---|---|
| committer | Alistair Francis <alistair.francis@wdc.com> | 2023-03-14 16:36:43 +1000 |
| commit | 0d581506de803204c5a321100afa270573382932 (patch) | |
| tree | 4d6c3865e3c3296ac411fcf8d887bbab2bb4e612 /tests/avocado | |
| parent | 13e269f64aae28b76a9909eed445dfe526086766 (diff) | |
Fix incorrect register name in disassembler for fmv,fabs,fneg instructions
Fix incorrect register name in RISC-V disassembler for fmv,fabs,fneg instructions
Signed-off-by: Mikhail Tyutin <m.tyutin@yadro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <3454991f-7f64-24c3-9a36-f5fa2cc389e1@yadro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'tests/avocado')
0 files changed, 0 insertions, 0 deletions