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authorJohn Snow <jsnow@redhat.com>2015-02-05 12:41:17 -0500
committerStefan Hajnoczi <stefanha@redhat.com>2015-02-16 15:07:17 +0000
commit5bf99aa1cf67a210dd441ae4edf1e26df05360d5 (patch)
tree7af8f45b1bdaa35a16abaf7a652f071124a97000 /tests/ahci-test.c
parent85c34e9395a97e49def6697537417ead2077c096 (diff)
libqos/ahci: Add ahci_port_check_interrupts helper
A helper that compares a given port's current interrupts and checks them against a supplied list of expected interrupt bits, and throws an error if they do not match. The helper then resets the requested interrupts on this port, and asserts that the interrupt register is now empty. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1423158090-25580-7-git-send-email-jsnow@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'tests/ahci-test.c')
-rw-r--r--tests/ahci-test.c13
1 files changed, 2 insertions, 11 deletions
diff --git a/tests/ahci-test.c b/tests/ahci-test.c
index a3e8f1292b..32b6be3b92 100644
--- a/tests/ahci-test.c
+++ b/tests/ahci-test.c
@@ -747,19 +747,10 @@ static void ahci_test_identify(AHCIQState *ahci)
while (BITSET(ahci_px_rreg(ahci, i, AHCI_PX_TFD), AHCI_PX_TFD_STS_BSY)) {
usleep(50);
}
+ /* Check registers for post-command consistency */
ahci_port_check_error(ahci, i);
-
- /* Check for expected interrupts */
- reg = ahci_px_rreg(ahci, i, AHCI_PX_IS);
- ASSERT_BIT_SET(reg, AHCI_PX_IS_DHRS);
- ASSERT_BIT_SET(reg, AHCI_PX_IS_PSS);
/* BUG: we expect AHCI_PX_IS_DPS to be set. */
- ASSERT_BIT_CLEAR(reg, AHCI_PX_IS_DPS);
-
- /* Clear expected interrupts and assert all interrupts now cleared. */
- ahci_px_wreg(ahci, i, AHCI_PX_IS,
- AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS | AHCI_PX_IS_DPS);
- g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0);
+ ahci_port_check_interrupts(ahci, i, AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS);
/* Investigate the CMD, assert that we read 512 bytes */
ahci_get_command_header(ahci, i, cx, &cmd);