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authorRichard Henderson <richard.henderson@linaro.org>2021-01-29 13:14:11 -1000
committerRichard Henderson <richard.henderson@linaro.org>2021-03-17 07:24:44 -0600
commit963e9fa2bdde449ef9fe6b6f345d764d0d5901c2 (patch)
tree9869cd8e37c751eabe1eed583798a96f06dbaee8 /tcg
parente85e4b8f959f6d03087dbc973a1201b894a1c62b (diff)
tcg/tci: Split out tci_args_rrrc
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/tci.c24
1 files changed, 14 insertions, 10 deletions
diff --git a/tcg/tci.c b/tcg/tci.c
index 1c879a2536..dd9bcd74f3 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -180,6 +180,7 @@ static tcg_target_ulong tci_read_label(const uint8_t **tb_ptr)
* tci_args_<arguments>
* where arguments is a sequence of
*
+ * c = condition (TCGCond)
* r = register
* s = signed ldst offset
*/
@@ -207,6 +208,15 @@ static void tci_args_rrs(const uint8_t **tb_ptr,
*i2 = tci_read_s32(tb_ptr);
}
+static void tci_args_rrrc(const uint8_t **tb_ptr,
+ TCGReg *r0, TCGReg *r1, TCGReg *r2, TCGCond *c3)
+{
+ *r0 = tci_read_r(tb_ptr);
+ *r1 = tci_read_r(tb_ptr);
+ *r2 = tci_read_r(tb_ptr);
+ *c3 = tci_read_b(tb_ptr);
+}
+
static bool tci_compare32(uint32_t u0, uint32_t u1, TCGCond condition)
{
bool result = false;
@@ -413,11 +423,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
tb_ptr = (uint8_t *)label;
continue;
case INDEX_op_setcond_i32:
- t0 = *tb_ptr++;
- t1 = tci_read_rval(regs, &tb_ptr);
- t2 = tci_read_rval(regs, &tb_ptr);
- condition = *tb_ptr++;
- tci_write_reg(regs, t0, tci_compare32(t1, t2, condition));
+ tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition);
+ regs[r0] = tci_compare32(regs[r1], regs[r2], condition);
break;
#if TCG_TARGET_REG_BITS == 32
case INDEX_op_setcond2_i32:
@@ -429,11 +436,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
break;
#elif TCG_TARGET_REG_BITS == 64
case INDEX_op_setcond_i64:
- t0 = *tb_ptr++;
- t1 = tci_read_rval(regs, &tb_ptr);
- t2 = tci_read_rval(regs, &tb_ptr);
- condition = *tb_ptr++;
- tci_write_reg(regs, t0, tci_compare64(t1, t2, condition));
+ tci_args_rrrc(&tb_ptr, &r0, &r1, &r2, &condition);
+ regs[r0] = tci_compare64(regs[r1], regs[r2], condition);
break;
#endif
CASE_32_64(mov)