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authorRichard Henderson <richard.henderson@linaro.org>2023-04-08 05:37:03 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-04-10 08:29:24 -0700
commit25acc3f279d215250d0628e592ed7557a88aa3a7 (patch)
tree62f8bab4c857170591af257e01919b98df35633e /tcg
parent7d9e1ee424b06a43708be02474e6714962cfee92 (diff)
tcg/mips: Fix TCG_TARGET_CALL_RET_I128 for o32 abi
The return is by reference, not in 4 integer registers. This error resulted in qemu-system-i386: tcg/mips/tcg-target.c.inc:140: \ tcg_target_call_oarg_reg: Assertion `slot >= 0 && slot <= 1' failed. Fixes: 5427a9a7604 ("tcg: Add TCG_TARGET_CALL_{RET,ARG}_I128") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg')
-rw-r--r--tcg/mips/tcg-target.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 68b11e4d48..2431fc5353 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -84,13 +84,14 @@ typedef enum {
#if _MIPS_SIM == _ABIO32
# define TCG_TARGET_CALL_STACK_OFFSET 16
# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_EVEN
+# define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_BY_REF
#else
# define TCG_TARGET_CALL_STACK_OFFSET 0
# define TCG_TARGET_CALL_ARG_I64 TCG_CALL_ARG_NORMAL
+# define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
#endif
#define TCG_TARGET_CALL_ARG_I32 TCG_CALL_ARG_NORMAL
#define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_EVEN
-#define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL
/* MOVN/MOVZ instructions detection */
#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 1)) || \