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authorSergey Sorokin <afarallax@yandex.ru>2016-05-12 13:22:26 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-05-12 13:22:26 +0100
commitdddb5223413c5425ae6eaeb3b967627efc9675f7 (patch)
tree8bbd559f3fa8718ce15e0f8182fb80c42bcedea8 /tcg
parentdfda68377e20943f474505e75238cb96bc6874bf (diff)
target-arm: Fix descriptor address masking in ARM address translation
There is a bug in ARM address translation regime with a long-descriptor format. On the descriptor reading its address is formed from an index which is a part of the input address. And on the first iteration this index is incorrectly masked with 'grainsize' mask. But it can be wider according to pseudo-code. On the other hand on the iterations other than first the descriptor address is formed from the previous level descriptor by masking with 'descaddrmask' value. It always clears just 12 lower bits, but it must clear 'grainsize' lower bits instead according to pseudo-code. The patch fixes both cases. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Message-id: 1460996853-22117-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'tcg')
0 files changed, 0 insertions, 0 deletions