diff options
author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-13 09:34:48 +0000 |
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committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-13 09:34:48 +0000 |
commit | 66896cb803b4865c0c35b218dbc407e1fcf7f7f7 (patch) | |
tree | 63c1a7a79b7614ef91d0d431e14f32687b88f2f2 /tcg | |
parent | 537a1d4bb02b7c5d21c8f3c853f7c7ae3782bc3f (diff) |
tcg: rename bswap_i32/i64 functions
Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg')
-rw-r--r-- | tcg/arm/tcg-target.h | 2 | ||||
-rw-r--r-- | tcg/hppa/tcg-target.h | 2 | ||||
-rw-r--r-- | tcg/i386/tcg-target.c | 4 | ||||
-rw-r--r-- | tcg/i386/tcg-target.h | 2 | ||||
-rw-r--r-- | tcg/sparc/tcg-target.h | 4 | ||||
-rw-r--r-- | tcg/tcg-op.h | 18 | ||||
-rw-r--r-- | tcg/tcg-opc.h | 8 | ||||
-rw-r--r-- | tcg/x86_64/tcg-target.c | 8 | ||||
-rw-r--r-- | tcg/x86_64/tcg-target.h | 4 |
9 files changed, 26 insertions, 26 deletions
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index cccb8f9dbb..8f5016fc46 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -28,7 +28,7 @@ #undef TCG_TARGET_WORDS_BIGENDIAN #undef TCG_TARGET_HAS_div_i32 #undef TCG_TARGET_HAS_div_i64 -#undef TCG_TARGET_HAS_bswap_i32 +#undef TCG_TARGET_HAS_bswap32_i32 #define TCG_TARGET_HAS_ext8s_i32 #define TCG_TARGET_HAS_ext16s_i32 #define TCG_TARGET_HAS_neg_i32 diff --git a/tcg/hppa/tcg-target.h b/tcg/hppa/tcg-target.h index 02dd294278..7ab6f0cede 100644 --- a/tcg/hppa/tcg-target.h +++ b/tcg/hppa/tcg-target.h @@ -78,7 +78,7 @@ enum { //#define TCG_TARGET_HAS_ext8s_i32 //#define TCG_TARGET_HAS_ext16s_i32 //#define TCG_TARGET_HAS_bswap16_i32 -//#define TCG_TARGET_HAS_bswap_i32 +//#define TCG_TARGET_HAS_bswap32_i32 /* Note: must be synced with dyngen-exec.h */ #define TCG_AREG0 TCG_REG_R17 diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index c8f7fff7e5..d8b5563bd3 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -1034,7 +1034,7 @@ static inline void tcg_out_op(TCGContext *s, int opc, tcg_out_brcond2(s, args, const_args); break; - case INDEX_op_bswap_i32: + case INDEX_op_bswap32_i32: tcg_out_opc(s, (0xc8 + args[0]) | P_EXT); break; @@ -1130,7 +1130,7 @@ static const TCGTargetOpDef x86_op_defs[] = { { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } }, { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } }, - { INDEX_op_bswap_i32, { "r", "0" } }, + { INDEX_op_bswap32_i32, { "r", "0" } }, { INDEX_op_neg_i32, { "r", "0" } }, diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index b5dec57dcf..60450a4462 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -45,7 +45,7 @@ enum { #define TCG_TARGET_CALL_STACK_OFFSET 0 /* optional instructions */ -#define TCG_TARGET_HAS_bswap_i32 +#define TCG_TARGET_HAS_bswap32_i32 #define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_not_i32 #define TCG_TARGET_HAS_ext8s_i32 diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 22bd9fed37..43ec8180f3 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -86,8 +86,8 @@ enum { #endif /* optional instructions */ -//#define TCG_TARGET_HAS_bswap_i32 -//#define TCG_TARGET_HAS_bswap_i64 +//#define TCG_TARGET_HAS_bswap32_i32 +//#define TCG_TARGET_HAS_bswap64_i64 //#define TCG_TARGET_HAS_neg_i32 //#define TCG_TARGET_HAS_neg_i64 diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 190a365b80..fa0f01cdd3 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -1220,10 +1220,10 @@ static inline void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg) #endif } -static inline void tcg_gen_bswap_i32(TCGv_i32 ret, TCGv_i32 arg) +static inline void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg) { -#ifdef TCG_TARGET_HAS_bswap_i32 - tcg_gen_op2_i32(INDEX_op_bswap_i32, ret, arg); +#ifdef TCG_TARGET_HAS_bswap32_i32 + tcg_gen_op2_i32(INDEX_op_bswap32_i32, ret, arg); #else TCGv_i32 t0, t1; t0 = tcg_temp_new_i32(); @@ -1300,14 +1300,14 @@ static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg) tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); } -static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg) +static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg) { TCGv_i32 t0, t1; t0 = tcg_temp_new_i32(); t1 = tcg_temp_new_i32(); - tcg_gen_bswap_i32(t0, TCGV_LOW(arg)); - tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); + tcg_gen_bswap32_i32(t0, TCGV_LOW(arg)); + tcg_gen_bswap32_i32(t1, TCGV_HIGH(arg)); tcg_gen_mov_i32(TCGV_LOW(ret), t1); tcg_gen_mov_i32(TCGV_HIGH(ret), t0); tcg_temp_free_i32(t0); @@ -1381,10 +1381,10 @@ static inline void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg) tcg_gen_ext32s_i64(ret, MAKE_TCGV_I64(GET_TCGV_I32(arg))); } -static inline void tcg_gen_bswap_i64(TCGv_i64 ret, TCGv_i64 arg) +static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg) { -#ifdef TCG_TARGET_HAS_bswap_i64 - tcg_gen_op2_i64(INDEX_op_bswap_i64, ret, arg); +#ifdef TCG_TARGET_HAS_bswap64_i64 + tcg_gen_op2_i64(INDEX_op_bswap64_i64, ret, arg); #else TCGv_i32 t0, t1; t0 = tcg_temp_new_i32(); diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 560c8a7ada..c7f2b80d85 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -89,8 +89,8 @@ DEF2(ext8s_i32, 1, 1, 0, 0) #ifdef TCG_TARGET_HAS_ext16s_i32 DEF2(ext16s_i32, 1, 1, 0, 0) #endif -#ifdef TCG_TARGET_HAS_bswap_i32 -DEF2(bswap_i32, 1, 1, 0, 0) +#ifdef TCG_TARGET_HAS_bswap32_i32 +DEF2(bswap32_i32, 1, 1, 0, 0) #endif #ifdef TCG_TARGET_HAS_not_i32 DEF2(not_i32, 1, 1, 0, 0) @@ -149,8 +149,8 @@ DEF2(ext16s_i64, 1, 1, 0, 0) #ifdef TCG_TARGET_HAS_ext32s_i64 DEF2(ext32s_i64, 1, 1, 0, 0) #endif -#ifdef TCG_TARGET_HAS_bswap_i64 -DEF2(bswap_i64, 1, 1, 0, 0) +#ifdef TCG_TARGET_HAS_bswap64_i64 +DEF2(bswap64_i64, 1, 1, 0, 0) #endif #ifdef TCG_TARGET_HAS_not_i64 DEF2(not_i64, 1, 1, 0, 0) diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c index a840ac691d..b7c4aa613c 100644 --- a/tcg/x86_64/tcg-target.c +++ b/tcg/x86_64/tcg-target.c @@ -1094,10 +1094,10 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, args[3], P_REXW); break; - case INDEX_op_bswap_i32: + case INDEX_op_bswap32_i32: tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT, 0, args[0], 0); break; - case INDEX_op_bswap_i64: + case INDEX_op_bswap64_i64: tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT | P_REXW, 0, args[0], 0); break; @@ -1287,8 +1287,8 @@ static const TCGTargetOpDef x86_64_op_defs[] = { { INDEX_op_brcond_i64, { "r", "re" } }, - { INDEX_op_bswap_i32, { "r", "0" } }, - { INDEX_op_bswap_i64, { "r", "0" } }, + { INDEX_op_bswap32_i32, { "r", "0" } }, + { INDEX_op_bswap64_i64, { "r", "0" } }, { INDEX_op_neg_i32, { "r", "0" } }, { INDEX_op_neg_i64, { "r", "0" } }, diff --git a/tcg/x86_64/tcg-target.h b/tcg/x86_64/tcg-target.h index b7e7decf68..79d22ab837 100644 --- a/tcg/x86_64/tcg-target.h +++ b/tcg/x86_64/tcg-target.h @@ -56,8 +56,8 @@ enum { #define TCG_TARGET_CALL_STACK_OFFSET 0 /* optional instructions */ -#define TCG_TARGET_HAS_bswap_i32 -#define TCG_TARGET_HAS_bswap_i64 +#define TCG_TARGET_HAS_bswap32_i32 +#define TCG_TARGET_HAS_bswap64_i64 #define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_neg_i64 #define TCG_TARGET_HAS_not_i32 |