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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-20 11:26:40 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-20 11:26:40 +0000
commit650bbb361eb5d815bbe9aa8f2c0aa57eae5592b8 (patch)
tree3e3c1c680f7ec30b8c249163a863dee8a3786cbf /tcg
parent788abf8e41e5fa33bfcd2245c3e3eb47d60ceef7 (diff)
Implement neg_i32, clean-up.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4503 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg')
-rw-r--r--tcg/arm/tcg-target.c13
-rw-r--r--tcg/arm/tcg-target.h2
2 files changed, 10 insertions, 5 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 2ee4c1f34b..a126cf5d77 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -64,7 +64,7 @@ const int tcg_target_call_oarg_regs[2] = {
TCG_REG_R0, TCG_REG_R1
};
-static void patch_reloc(uint8_t *code_ptr, int type,
+static void patch_reloc(uint8_t *code_ptr, int type,
tcg_target_long value, tcg_target_long addend)
{
switch (type) {
@@ -913,7 +913,7 @@ static inline void tcg_out_qemu_ld(TCGContext *s, int cond,
1, 0, addr_reg2, SHIFT_IMM_LSL(0));
tcg_out_dat_imm(s, cond, ARITH_MOV, 2, 0, mem_index);
# endif
- tcg_out_bl(s, cond, (tcg_target_long) qemu_ld_helpers[s_bits] -
+ tcg_out_bl(s, cond, (tcg_target_long) qemu_ld_helpers[s_bits] -
(tcg_target_long) s->code_ptr);
switch (opc) {
@@ -1178,10 +1178,9 @@ static inline void tcg_out_qemu_st(TCGContext *s, int cond,
#endif
}
-extern void exec_loop;
static uint8_t *tb_ret_addr;
-static inline void tcg_out_op(TCGContext *s, int opc,
+static inline void tcg_out_op(TCGContext *s, int opc,
const TCGArg *args, const int *const_args)
{
int c;
@@ -1312,6 +1311,9 @@ static inline void tcg_out_op(TCGContext *s, int opc,
args[0], args[1], args[2], args[3],
args[4], args[5], SHIFT_IMM_LSL(0));
break;
+ case INDEX_op_neg_i32:
+ tcg_out_dat_imm(s, COND_AL, ARITH_RSB, args[0], args[1], 0);
+ break;
case INDEX_op_mul_i32:
tcg_out_mul32(s, COND_AL, args[0], args[1], args[2]);
break;
@@ -1384,7 +1386,7 @@ static inline void tcg_out_op(TCGContext *s, int opc,
case INDEX_op_qemu_ld64:
tcg_out_qemu_ld(s, COND_AL, args, 3);
break;
-
+
case INDEX_op_qemu_st8:
tcg_out_qemu_st(s, COND_AL, args, 0);
break;
@@ -1445,6 +1447,7 @@ static const TCGTargetOpDef arm_op_defs[] = {
{ INDEX_op_and_i32, { "r", "r", "r" } },
{ INDEX_op_or_i32, { "r", "r", "r" } },
{ INDEX_op_xor_i32, { "r", "r", "r" } },
+ { INDEX_op_neg_i32, { "r", "r" } },
{ INDEX_op_shl_i32, { "r", "r", "ri" } },
{ INDEX_op_shr_i32, { "r", "r", "ri" } },
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 39c779a5b7..ee8d78c8cf 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -31,6 +31,8 @@
#undef TCG_TARGET_HAS_bswap_i32
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
+#define TCG_TARGET_HAS_neg_i32
+#undef TCG_TARGET_HAS_neg_i64
#undef TCG_TARGET_STACK_GROWSUP
enum {