diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-04-05 13:26:51 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-04-23 08:18:04 +0100 |
| commit | d0e66c897f2cdfb0807b76567a17d7811487fac3 (patch) | |
| tree | 32008e904c4781188f591a9314af234095c5dfcd /tcg/tci | |
| parent | 678155b2c50aa3bf37abef6bfe914bf58f49bec2 (diff) | |
tcg: Split out tcg_out_ext8u
We will need a backend interface for performing 8-bit zero-extend.
Use it in tcg_reg_alloc_op in the meantime.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tci')
| -rw-r--r-- | tcg/tci/tcg-target.c.inc | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc index 029508e308..e946d9165e 100644 --- a/tcg/tci/tcg-target.c.inc +++ b/tcg/tci/tcg-target.c.inc @@ -575,6 +575,17 @@ static void tcg_out_ext8s(TCGContext *s, TCGType type, TCGReg rd, TCGReg rs) } } +static void tcg_out_ext8u(TCGContext *s, TCGReg rd, TCGReg rs) +{ + if (TCG_TARGET_REG_BITS == 64) { + tcg_debug_assert(TCG_TARGET_HAS_ext8u_i64); + tcg_out_op_rr(s, INDEX_op_ext8u_i64, rd, rs); + } else { + tcg_debug_assert(TCG_TARGET_HAS_ext8u_i32); + tcg_out_op_rr(s, INDEX_op_ext8u_i32, rd, rs); + } +} + static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs, tcg_target_long imm) { @@ -733,7 +744,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, CASE_32_64(neg) /* Optional (TCG_TARGET_HAS_neg_*). */ CASE_32_64(not) /* Optional (TCG_TARGET_HAS_not_*). */ - CASE_32_64(ext8u) /* Optional (TCG_TARGET_HAS_ext8u_*). */ CASE_32_64(ext16s) /* Optional (TCG_TARGET_HAS_ext16s_*). */ CASE_32_64(ext16u) /* Optional (TCG_TARGET_HAS_ext16u_*). */ CASE_64(ext32s) /* Optional (TCG_TARGET_HAS_ext32s_i64). */ @@ -814,6 +824,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, case INDEX_op_goto_tb: /* Always emitted via tcg_out_goto_tb. */ case INDEX_op_ext8s_i32: /* Always emitted via tcg_reg_alloc_op. */ case INDEX_op_ext8s_i64: + case INDEX_op_ext8u_i32: + case INDEX_op_ext8u_i64: default: g_assert_not_reached(); } |