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authorRichard Henderson <rth@twiddle.net>2012-09-21 10:13:34 -0700
committerMichael Roth <mdroth@linux.vnet.ibm.com>2012-10-09 01:42:08 -0500
commit6314cc0c7386888217fd857b79301866c8d9637c (patch)
tree181c1f2f40cf88d037b6f6530290a92811ddd280 /tcg/tcg.c
parentcc10061717877fc65b5c734c43c55f471913ce92 (diff)
tcg: Introduce movcond
Implemented with setcond if the target does not provide the optional opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Diffstat (limited to 'tcg/tcg.c')
-rw-r--r--tcg/tcg.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/tcg/tcg.c b/tcg/tcg.c
index c002a889e2..24ce830ae4 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -991,16 +991,15 @@ void tcg_dump_ops(TCGContext *s)
}
switch (c) {
case INDEX_op_brcond_i32:
-#if TCG_TARGET_REG_BITS == 32
- case INDEX_op_brcond2_i32:
-#elif TCG_TARGET_REG_BITS == 64
- case INDEX_op_brcond_i64:
-#endif
case INDEX_op_setcond_i32:
+ case INDEX_op_movcond_i32:
#if TCG_TARGET_REG_BITS == 32
+ case INDEX_op_brcond2_i32:
case INDEX_op_setcond2_i32:
-#elif TCG_TARGET_REG_BITS == 64
+#else
+ case INDEX_op_brcond_i64:
case INDEX_op_setcond_i64:
+ case INDEX_op_movcond_i64:
#endif
if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
qemu_log(",%s", cond_name[args[k++]]);