diff options
| author | Richard Henderson <rth@twiddle.net> | 2015-05-12 11:51:44 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-05-14 12:14:55 -0700 |
| commit | 59227d5d45bb3c31dc2118011691c35b3c00879c (patch) | |
| tree | bb7a884bf0fb334f9ab104c7051aca91d9e0e79a /tcg/tcg-opc.h | |
| parent | 1eeace9c237a729d11c7acd7c0338ab4562af637 (diff) | |
tcg: Merge memop and mmu_idx parameters to qemu_ld/st
At the tcg opcode level, not at the tcg-op.h generator level.
This requires minor changes through all of the tcg backends,
but none of the cpu translators.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/tcg-opc.h')
| -rw-r--r-- | tcg/tcg-opc.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 42d0cfef97..13ccb60a5d 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -179,13 +179,13 @@ DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END) #define TLADDR_ARGS (TARGET_LONG_BITS <= TCG_TARGET_REG_BITS ? 1 : 2) #define DATA64_ARGS (TCG_TARGET_REG_BITS == 64 ? 1 : 2) -DEF(qemu_ld_i32, 1, TLADDR_ARGS, 2, +DEF(qemu_ld_i32, 1, TLADDR_ARGS, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) -DEF(qemu_st_i32, 0, TLADDR_ARGS + 1, 2, +DEF(qemu_st_i32, 0, TLADDR_ARGS + 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) -DEF(qemu_ld_i64, DATA64_ARGS, TLADDR_ARGS, 2, +DEF(qemu_ld_i64, DATA64_ARGS, TLADDR_ARGS, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT) -DEF(qemu_st_i64, 0, TLADDR_ARGS + DATA64_ARGS, 2, +DEF(qemu_st_i64, 0, TLADDR_ARGS + DATA64_ARGS, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS | TCG_OPF_64BIT) #undef TLADDR_ARGS |