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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-10 08:57:16 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2009-03-10 08:57:16 +0000
commitfe75bcf70d2032e523c4aec8a19a0a1472780c6c (patch)
tree1098cc95921466bb124eb47d3a41d86709ad01e5 /tcg/tcg-op.h
parent44e6acb017c0cad72359008a8f92e99faac4b1d9 (diff)
tcg: use TCGV_EQUAL_I{32,64}
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6800 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/tcg-op.h')
-rw-r--r--tcg/tcg-op.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 32440d0c00..c5a4b34dcc 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -318,7 +318,7 @@ static inline void tcg_gen_br(int label)
static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
{
- if (GET_TCGV_I32(ret) != GET_TCGV_I32(arg))
+ if (!TCGV_EQUAL_I32(ret, arg))
tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
}
@@ -625,7 +625,7 @@ static inline void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
{
- if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg)) {
+ if (!TCGV_EQUAL_I64(ret, arg)) {
tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg));
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg));
}
@@ -858,7 +858,7 @@ static inline void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
{
- if (GET_TCGV_I64(ret) != GET_TCGV_I64(arg))
+ if (!TCGV_EQUAL_I64(ret, arg))
tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
}
@@ -1545,27 +1545,27 @@ static inline void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
static inline void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
{
- if (GET_TCGV_I32(arg1) != GET_TCGV_I32(arg2)) {
+ if (TCGV_EQUAL_I32(arg1, arg2)) {
+ tcg_gen_not_i32(ret, arg1);
+ } else {
TCGv_i32 t0;
t0 = tcg_temp_new_i32();
tcg_gen_or_i32(t0, arg1, arg2);
tcg_gen_not_i32(ret, t0);
tcg_temp_free_i32(t0);
- } else {
- tcg_gen_not_i32(ret, arg1);
}
}
static inline void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
{
- if (GET_TCGV_I64(arg1) != GET_TCGV_I64(arg2)) {
+ if (TCGV_EQUAL_I64(arg1, arg2)) {
+ tcg_gen_not_i64(ret, arg1);
+ } else {
TCGv_i64 t0;
t0 = tcg_temp_new_i64();
tcg_gen_or_i64(t0, arg1, arg2);
tcg_gen_not_i64(ret, t0);
tcg_temp_free_i64(t0);
- } else {
- tcg_gen_not_i64(ret, arg1);
}
}
@@ -1742,7 +1742,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
#define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
#define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
#define TCGV_UNUSED(x) TCGV_UNUSED_I32(x)
-#define TCGV_EQUAL(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
+#define TCGV_EQUAL(a, b) TCGV_EQUAL_I32(a, b)
#else
#define TCGv TCGv_i64
#define tcg_temp_new() tcg_temp_new_i64()
@@ -1753,7 +1753,7 @@ static inline void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2)
#define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
#define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64
#define TCGV_UNUSED(x) TCGV_UNUSED_I64(x)
-#define TCGV_EQUAL(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
+#define TCGV_EQUAL(a, b) TCGV_EQUAL_I64(a, b)
#endif
/* debug info: write the PC of the corresponding QEMU CPU instruction */