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authorpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-24 02:22:00 +0000
committerpbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-24 02:22:00 +0000
commitcb63669a54fdd926da7d07768f21f515acd4ad2a (patch)
treed29ed803c234690851e63d464e9b1a965adee28a /tcg/tcg-op.h
parent455f9004866c2f1fd630f09a18353501dea5a77e (diff)
Fix ARM conditional branch bug.
Add tcg_gen_brcondi. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'tcg/tcg-op.h')
-rw-r--r--tcg/tcg-op.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 469e444d5c..6c9dd76aa4 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -491,6 +491,14 @@ static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2,
tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
}
+static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2,
+ int label_index)
+{
+ TCGv t0 = tcg_const_i32(arg2);
+ tcg_gen_brcond_i32(cond, arg1, t0, label_index);
+ tcg_temp_free(t0);
+}
+
static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2);
@@ -1063,6 +1071,14 @@ static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
#endif
+static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
+ int label_index)
+{
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_brcond_i64(cond, arg1, t0, label_index);
+ tcg_temp_free(t0);
+}
+
/***************************************/
/* optional operations */
@@ -1614,6 +1630,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_sar_tl tcg_gen_sar_i64
#define tcg_gen_sari_tl tcg_gen_sari_i64
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
+#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
#define tcg_gen_mul_tl tcg_gen_mul_i64
#define tcg_gen_muli_tl tcg_gen_muli_i64
#define tcg_gen_discard_tl tcg_gen_discard_i64
@@ -1664,6 +1681,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_sar_tl tcg_gen_sar_i32
#define tcg_gen_sari_tl tcg_gen_sari_i32
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
+#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
#define tcg_gen_mul_tl tcg_gen_mul_i32
#define tcg_gen_muli_tl tcg_gen_muli_i32
#define tcg_gen_discard_tl tcg_gen_discard_i32