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authorRichard Henderson <richard.henderson@linaro.org>2020-04-19 18:01:52 -0700
committerRichard Henderson <richard.henderson@linaro.org>2020-06-02 08:42:37 -0700
commitb0f7e7444c03da17e41bf327c8aea590104a28ab (patch)
tree8f3924b2a96e628be571d6d000aa27f63cf58d19 /tcg/tcg-op-vec.c
parentcccdd8c7971896c339d59c9c5d4647d4ffd9568a (diff)
tcg: Implement gvec support for rotate by immediate
No host backend support yet, but the interfaces for rotli are in place. Canonicalize immediate rotate to the left, based on a survey of architectures, but provide both left and right shift interfaces to the translators. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/tcg-op-vec.c')
-rw-r--r--tcg/tcg-op-vec.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index b6937e8d64..660ad9be88 100644
--- a/tcg/tcg-op-vec.c
+++ b/tcg/tcg-op-vec.c
@@ -545,6 +545,18 @@ void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i)
do_shifti(INDEX_op_sari_vec, vece, r, a, i);
}
+void tcg_gen_rotli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i)
+{
+ do_shifti(INDEX_op_rotli_vec, vece, r, a, i);
+}
+
+void tcg_gen_rotri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i)
+{
+ int bits = 8 << vece;
+ tcg_debug_assert(i >= 0 && i < bits);
+ do_shifti(INDEX_op_rotli_vec, vece, r, a, -i & (bits - 1));
+}
+
void tcg_gen_cmp_vec(TCGCond cond, unsigned vece,
TCGv_vec r, TCGv_vec a, TCGv_vec b)
{