diff options
author | Richard Henderson <rth@twiddle.net> | 2010-02-18 14:44:39 -0800 |
---|---|---|
committer | Blue Swirl <blauwirbel@gmail.com> | 2010-02-20 08:35:12 +0000 |
commit | 36828256692c3cecc83607f22761ceefc382040e (patch) | |
tree | a78607741f3b9da5cd8787641a9503442db06232 /tcg/sparc | |
parent | 18c8f7a35d7b771392326c5723abe4e6b5908ca0 (diff) |
tcg: Add comments for all optional instructions not implemented.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'tcg/sparc')
-rw-r--r-- | tcg/sparc/tcg-target.h | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index dc6878767a..dbc574d568 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -89,26 +89,36 @@ enum { /* optional instructions */ #define TCG_TARGET_HAS_div_i32 -#define TCG_TARGET_HAS_div_i64 - +// #define TCG_TARGET_HAS_rot_i32 +// #define TCG_TARGET_HAS_ext8s_i32 +// #define TCG_TARGET_HAS_ext16s_i32 +// #define TCG_TARGET_HAS_ext8u_i32 +// #define TCG_TARGET_HAS_ext16u_i32 +// #define TCG_TARGET_HAS_bswap16_i32 +// #define TCG_TARGET_HAS_bswap32_i32 #define TCG_TARGET_HAS_neg_i32 #define TCG_TARGET_HAS_not_i32 #define TCG_TARGET_HAS_andc_i32 #define TCG_TARGET_HAS_orc_i32 #if TCG_TARGET_REG_BITS == 64 +#define TCG_TARGET_HAS_div_i64 +// #define TCG_TARGET_HAS_rot_i64 +// #define TCG_TARGET_HAS_ext8s_i64 +// #define TCG_TARGET_HAS_ext16s_i64 #define TCG_TARGET_HAS_ext32s_i64 +// #define TCG_TARGET_HAS_ext8u_i64 +// #define TCG_TARGET_HAS_ext16u_i64 #define TCG_TARGET_HAS_ext32u_i64 +// #define TCG_TARGET_HAS_bswap16_i64 +// #define TCG_TARGET_HAS_bswap32_i64 +// #define TCG_TARGET_HAS_bswap64_i64 #define TCG_TARGET_HAS_neg_i64 #define TCG_TARGET_HAS_not_i64 #define TCG_TARGET_HAS_andc_i64 #define TCG_TARGET_HAS_orc_i64 #endif -//#define TCG_TARGET_HAS_bswap32_i32 -//#define TCG_TARGET_HAS_bswap64_i64 - - /* Note: must be synced with dyngen-exec.h and Makefile.target */ #ifdef CONFIG_SOLARIS #define TCG_AREG0 TCG_REG_G2 |