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authorPeter Maydell <peter.maydell@linaro.org>2017-03-30 11:52:31 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-04-03 12:59:37 +0100
commit5c32be5baf41aec4f4675d2bf24f9948756abf3c (patch)
treea3fbd1e3cf50b3cebe8e7b128f8aa601761520ba /tcg/sparc
parent709a340d679d95a0c6cbb9b5f654498f04345b50 (diff)
tcg/sparc: Zero extend address argument to ld/st helpers
The C store helper functions take the address argument as a target_ulong type; if this is 32 bit but the host is 64 bit then the SPARC calling convention requires that the caller must zero extend the value. We weren't doing this, which meant we could pass values to the caller with high bits set and QEMU would crash if it was compiled with optimizations. In particular, the i386 BIOS would not start. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1490871151-29029-3-git-send-email-peter.maydell@linaro.org Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/sparc')
-rw-r--r--tcg/sparc/tcg-target.inc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/tcg/sparc/tcg-target.inc.c b/tcg/sparc/tcg-target.inc.c
index ab3403998b..3785d77f62 100644
--- a/tcg/sparc/tcg-target.inc.c
+++ b/tcg/sparc/tcg-target.inc.c
@@ -1144,7 +1144,7 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr,
/* Skip the high-part; we'll perform the extract in the trampoline. */
param++;
}
- tcg_out_mov(s, TCG_TYPE_REG, param++, addr);
+ tcg_out_mov(s, TCG_TYPE_REG, param++, addrz);
/* We use the helpers to extend SB and SW data, leaving the case
of SL needing explicit extending below. */
@@ -1224,7 +1224,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr,
/* Skip the high-part; we'll perform the extract in the trampoline. */
param++;
}
- tcg_out_mov(s, TCG_TYPE_REG, param++, addr);
+ tcg_out_mov(s, TCG_TYPE_REG, param++, addrz);
if (!SPARC64 && (memop & MO_SIZE) == MO_64) {
/* Skip the high-part; we'll perform the extract in the trampoline. */
param++;