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authorRichard Henderson <richard.henderson@linaro.org>2023-04-05 16:25:22 -0700
committerRichard Henderson <richard.henderson@linaro.org>2023-04-23 08:21:30 +0100
commit379afdff47556f01e75ce2caffd7ae9efa4f1214 (patch)
tree5ef028391e8d09a07713234138ccd6ee6420e1ef /tcg/sparc64
parent753e42eada5c790bb3727c262f2e368e81cc788f (diff)
tcg: Split out tcg_out_ext16u
We will need a backend interface for performing 16-bit zero-extend. Use it in tcg_reg_alloc_op in the meantime. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/sparc64')
-rw-r--r--tcg/sparc64/tcg-target.c.inc11
1 files changed, 9 insertions, 2 deletions
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index e4a8bd6e27..98784f6545 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -511,6 +511,12 @@ static void tcg_out_ext8u(TCGContext *s, TCGReg rd, TCGReg rs)
tcg_out_arithi(s, rd, rs, 0xff, ARITH_AND);
}
+static void tcg_out_ext16u(TCGContext *s, TCGReg rd, TCGReg rs)
+{
+ tcg_out_arithi(s, rd, rs, 16, SHIFT_SLL);
+ tcg_out_arithi(s, rd, rd, 16, SHIFT_SRL);
+}
+
static void tcg_out_addi_ptr(TCGContext *s, TCGReg rd, TCGReg rs,
tcg_target_long imm)
{
@@ -896,8 +902,7 @@ static void emit_extend(TCGContext *s, TCGReg r, int op)
tcg_out_ext8u(s, r, r);
break;
case MO_16:
- tcg_out_arithi(s, r, r, 16, SHIFT_SLL);
- tcg_out_arithi(s, r, r, 16, SHIFT_SRL);
+ tcg_out_ext16u(s, r, r);
break;
case MO_32:
tcg_out_arith(s, r, r, 0, SHIFT_SRL);
@@ -1721,6 +1726,8 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_ext8u_i64:
case INDEX_op_ext16s_i32:
case INDEX_op_ext16s_i64:
+ case INDEX_op_ext16u_i32:
+ case INDEX_op_ext16u_i64:
default:
g_assert_not_reached();
}