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authorRichard Henderson <richard.henderson@linaro.org>2022-10-17 08:17:45 +0300
committerRichard Henderson <richard.henderson@linaro.org>2022-11-01 07:28:53 +1100
commita59a293126604183dd63bf8b890393e32e7702c4 (patch)
tree091f183c90fbfccd13af8922ca05ece507a4811d /tcg/sparc64/tcg-target-con-set.h
parent6d0b52ed889f47fa8e39e9611d7bce15cc533369 (diff)
tcg/sparc64: Remove sparc32plus constraints
With sparc64 we need not distinguish between registers that can hold 32-bit values and those that can hold 64-bit values. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/sparc64/tcg-target-con-set.h')
-rw-r--r--tcg/sparc64/tcg-target-con-set.h16
1 files changed, 3 insertions, 13 deletions
diff --git a/tcg/sparc64/tcg-target-con-set.h b/tcg/sparc64/tcg-target-con-set.h
index 3b751dc3fb..31e6fea1fc 100644
--- a/tcg/sparc64/tcg-target-con-set.h
+++ b/tcg/sparc64/tcg-target-con-set.h
@@ -11,22 +11,12 @@
*/
C_O0_I1(r)
C_O0_I2(rZ, r)
-C_O0_I2(RZ, r)
C_O0_I2(rZ, rJ)
-C_O0_I2(RZ, RJ)
-C_O0_I2(sZ, A)
-C_O0_I2(SZ, A)
-C_O1_I1(r, A)
-C_O1_I1(R, A)
+C_O0_I2(sZ, s)
+C_O1_I1(r, s)
C_O1_I1(r, r)
-C_O1_I1(r, R)
-C_O1_I1(R, r)
-C_O1_I1(R, R)
-C_O1_I2(R, R, R)
+C_O1_I2(r, r, r)
C_O1_I2(r, rZ, rJ)
-C_O1_I2(R, RZ, RJ)
C_O1_I4(r, rZ, rJ, rI, 0)
-C_O1_I4(R, RZ, RJ, RI, 0)
C_O2_I2(r, r, rZ, rJ)
-C_O2_I4(R, R, RZ, RZ, RJ, RI)
C_O2_I4(r, r, rZ, rZ, rJ, rJ)