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authorRichard Henderson <richard.henderson@linaro.org>2022-10-17 08:00:57 +0300
committerRichard Henderson <richard.henderson@linaro.org>2022-11-01 07:28:53 +1100
commit6d0b52ed889f47fa8e39e9611d7bce15cc533369 (patch)
tree3dab78bd0668804d86d7d8f9cef0a4e63c97d916 /tcg/sparc64/tcg-target-con-set.h
parent3a5f6805c7ca7deb8d1abaf0153936eeb51d074e (diff)
tcg/sparc64: Rename from tcg/sparc
Emphasize that we only support full 64-bit code generation. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/sparc64/tcg-target-con-set.h')
-rw-r--r--tcg/sparc64/tcg-target-con-set.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/tcg/sparc64/tcg-target-con-set.h b/tcg/sparc64/tcg-target-con-set.h
new file mode 100644
index 0000000000..3b751dc3fb
--- /dev/null
+++ b/tcg/sparc64/tcg-target-con-set.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Define Sparc target-specific constraint sets.
+ * Copyright (c) 2021 Linaro
+ */
+
+/*
+ * C_On_Im(...) defines a constraint set with <n> outputs and <m> inputs.
+ * Each operand should be a sequence of constraint letters as defined by
+ * tcg-target-con-str.h; the constraint combination is inclusive or.
+ */
+C_O0_I1(r)
+C_O0_I2(rZ, r)
+C_O0_I2(RZ, r)
+C_O0_I2(rZ, rJ)
+C_O0_I2(RZ, RJ)
+C_O0_I2(sZ, A)
+C_O0_I2(SZ, A)
+C_O1_I1(r, A)
+C_O1_I1(R, A)
+C_O1_I1(r, r)
+C_O1_I1(r, R)
+C_O1_I1(R, r)
+C_O1_I1(R, R)
+C_O1_I2(R, R, R)
+C_O1_I2(r, rZ, rJ)
+C_O1_I2(R, RZ, RJ)
+C_O1_I4(r, rZ, rJ, rI, 0)
+C_O1_I4(R, RZ, RJ, RI, 0)
+C_O2_I2(r, r, rZ, rJ)
+C_O2_I4(R, R, RZ, RZ, RJ, RI)
+C_O2_I4(r, r, rZ, rZ, rJ, rJ)