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authorRichard Henderson <rth@twiddle.net>2015-05-12 11:51:44 -0700
committerRichard Henderson <rth@twiddle.net>2015-05-14 12:14:55 -0700
commit59227d5d45bb3c31dc2118011691c35b3c00879c (patch)
treebb7a884bf0fb334f9ab104c7051aca91d9e0e79a /tcg/sparc/tcg-target.c
parent1eeace9c237a729d11c7acd7c0338ab4562af637 (diff)
tcg: Merge memop and mmu_idx parameters to qemu_ld/st
At the tcg opcode level, not at the tcg-op.h generator level. This requires minor changes through all of the tcg backends, but none of the cpu translators. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'tcg/sparc/tcg-target.c')
-rw-r--r--tcg/sparc/tcg-target.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index f9b616ffae..ccc3173e3c 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -1070,9 +1070,11 @@ static const int qemu_st_opc[16] = {
};
static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr,
- TCGMemOp memop, int memi, bool is_64)
+ TCGMemOpIdx oi, bool is_64)
{
+ TCGMemOp memop = get_memop(oi);
#ifdef CONFIG_SOFTMMU
+ unsigned memi = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE;
TCGReg addrz, param;
tcg_insn_unit *func;
@@ -1150,9 +1152,11 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data, TCGReg addr,
}
static void tcg_out_qemu_st(TCGContext *s, TCGReg data, TCGReg addr,
- TCGMemOp memop, int memi)
+ TCGMemOpIdx oi)
{
+ TCGMemOp memop = get_memop(oi);
#ifdef CONFIG_SOFTMMU
+ unsigned memi = get_mmuidx(oi);
TCGMemOp s_bits = memop & MO_SIZE;
TCGReg addrz, param;
tcg_insn_unit *func;
@@ -1363,14 +1367,14 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_qemu_ld_i32:
- tcg_out_qemu_ld(s, a0, a1, a2, args[3], false);
+ tcg_out_qemu_ld(s, a0, a1, a2, false);
break;
case INDEX_op_qemu_ld_i64:
- tcg_out_qemu_ld(s, a0, a1, a2, args[3], true);
+ tcg_out_qemu_ld(s, a0, a1, a2, true);
break;
case INDEX_op_qemu_st_i32:
case INDEX_op_qemu_st_i64:
- tcg_out_qemu_st(s, a0, a1, a2, args[3]);
+ tcg_out_qemu_st(s, a0, a1, a2);
break;
case INDEX_op_ld32s_i64: