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authorRichard Henderson <richard.henderson@linaro.org>2020-09-14 15:15:31 -0700
committerRichard Henderson <richard.henderson@linaro.org>2021-10-05 16:53:17 -0700
commit3704993f545efbe7b5a9ede83525f0d9c07cb31f (patch)
treecf1a2de9efece1c527c003f7b345999a080f1a4b /tcg/s390x/tcg-target-con-str.h
parent2552d60ebd6c519027d74bd452db7580b90e5cbd (diff)
tcg/s390x: Rename from tcg/s390
This emphasizes that we don't support s390, only 64-bit s390x hosts. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: David Hildenbrand <david@redhat.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'tcg/s390x/tcg-target-con-str.h')
-rw-r--r--tcg/s390x/tcg-target-con-str.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/tcg/s390x/tcg-target-con-str.h b/tcg/s390x/tcg-target-con-str.h
new file mode 100644
index 0000000000..892d8f8c06
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+++ b/tcg/s390x/tcg-target-con-str.h
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+/* SPDX-License-Identifier: MIT */
+/*
+ * Define S390 target-specific operand constraints.
+ * Copyright (c) 2021 Linaro
+ */
+
+/*
+ * Define constraint letters for register sets:
+ * REGS(letter, register_mask)
+ */
+REGS('r', ALL_GENERAL_REGS)
+REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS)
+/*
+ * A (single) even/odd pair for division.
+ * TODO: Add something to the register allocator to allow
+ * this kind of regno+1 pairing to be done more generally.
+ */
+REGS('a', 1u << TCG_REG_R2)
+REGS('b', 1u << TCG_REG_R3)
+
+/*
+ * Define constraint letters for constants:
+ * CONST(letter, TCG_CT_CONST_* bit set)
+ */
+CONST('A', TCG_CT_CONST_S33)
+CONST('I', TCG_CT_CONST_S16)
+CONST('J', TCG_CT_CONST_S32)
+CONST('Z', TCG_CT_CONST_ZERO)